XC5VLX110-1FF676I Xilinx Inc, XC5VLX110-1FF676I Datasheet - Page 81

• Manufacturer Part Number: XC5VLX110-1FF676I
• Description: IC FPGA VIRTEX-5 110K 676FBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXr

Specifications of XC5VLX110-1FF676I

• Number Of Logic Elements/cells: 110592
• Number Of Labs/clbs: 8640
• Total Ram Bits: 4718592
• Number Of I /o: 440
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 676-BBGA, FCBGA
• For Use With: HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF676-500-G - BOARD DEV VIRTEX 5 FF676
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
DCM with PLL
The PLL can be used to drive the DCM to reduce the source clock’s incoming jitter before
inputting DCM. This setup reduces the source clock jitter while enabling user access to all
available DCM clock outputs.
same CMT block using the dedicated routing resource (without BUFG).
X-Ref Target - Figure 2-14
IBUFG
www.xilinx.com
Figure 2-14: PLL Driving DCM
Figure 2-14
CLKIN1
CLKFBIN
RST
CLKIN
CLKFBIN
RST
illustrates the PLL driving a DCM within the
DCM
PLL
CLKFBOUT
CLKFX180
CLK2X180
CLKOUT0
CLKOUT1
CLKOUT2
CLKOUT3
CLKOUT4
CLKOUT5
CLK180
CLK270
CLKDV
CLK2X
CLKFX
CLK90
CLK0
BUFG
BUFG
ug190_2_15_040906
Application Examples
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