XC5VLX50T-3FF1136C Xilinx Inc, XC5VLX50T-3FF1136C Datasheet - Page 78
![IC FPGA VIRTEX-5 50K 1136FBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VLX50T-3FF1136C
Manufacturer Part Number
XC5VLX50T-3FF1136C
Description
IC FPGA VIRTEX-5 50K 1136FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX50T-3FF1136C
Number Of Logic Elements/cells
46080
Number Of Labs/clbs
3600
Total Ram Bits
2211840
Number Of I /o
480
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1136-BBGA, FCBGA
For Use With
122-1586 - BOARD EVAL FOR VIRTEX-5 ML555HW-V5-ML561-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML550-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-V5-ML521-UNI-G - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136HW-V5GBE-DK-UNI-G - KIT DEV V5 LXT GIGABIT ETHERNET122-1508 - EVALUATION PLATFORM VIRTEX-5
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VLX50T-3FF1136C
Manufacturer:
XILINX
Quantity:
166
Company:
Part Number:
XC5VLX50T-3FF1136C
Manufacturer:
Xilinx Inc
Quantity:
10 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
- XC5VLX30T-1FFG665C_PRODUCT_CHANGE PDF datasheet #4
- Current page: 78 of 385
- Download datasheet (14Mb)
Chapter 2: Clock Management Technology
78
X-Ref Target - Figure 2-11
Figure 2-11: Board Deskew with Internal Deskew Interfacing to Other Virtex
IBUFG
IBUFG
IBUFG
for Virtex and Virtex-E devices, DCM for Virtex-II and Virtex-II Pro devices.
This circuit can be duplicated to multiple Virtex devices. Use CLKDLL
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
CLKIN
CLKFB
RST
PSINCDEC
PSEN
PSCLK
DADDR[6:0]
DI[15:0]
DWE
DEN
DCLK
www.xilinx.com
Virtex-5 FPGA
Virtex-5 FPGA
DCM_ADV
DCM_ADV
DCM_ADV
CLKFX180
CLKFX180
CLKFX180
CLK2X180
CLK2X180
CLK2X180
LOCKED
DO[15:0]
LOCKED
DO[15:0]
LOCKED
DO(15:0)
CLK180
CLK270
CLK180
CLK270
CLK180
CLK270
CLKDV
CLKFX
CLKDV
CLKFX
CLKDV
CLKFX
CLK2X
CLK2X
CLK2X
CLK90
CLK90
CLK90
CLK0
CLK0
CLK0
Devices
BUFG
BUFG
BUFG
INV
V
CC
GND
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
OBUF
D1
D2
C
ODDR
Q
ug190_2_12_032506
to
RST
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