XCV200E-6FG256C Xilinx Inc, XCV200E-6FG256C Datasheet - Page 117
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XCV200E-6FG256C
Manufacturer Part Number
XCV200E-6FG256C
Description
IC FPGA 1.8V C-TEMP 256-FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-Er
Datasheet
1.XCV200E-6CS144C.pdf
(233 pages)
Specifications of XCV200E-6FG256C
Number Of Logic Elements/cells
5292
Number Of Labs/clbs
1176
Total Ram Bits
114688
Number Of I /o
176
Number Of Gates
306393
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-BGA
Case
BGA
Dc
02+
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XCV200E-6FG256C
Manufacturer:
XILINX
Quantity:
12 388
Company:
Part Number:
XCV200E-6FG256C
Manufacturer:
XILINX
Quantity:
988
Part Number:
XCV200E-6FG256C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
BG432 Differential Pin Pairs
Virtex-E devices have differential pin pairs that can also Vir-
tex-E devices have differential pin pairs that can also pro-
vide other functions when not used as a differential pair. A √
in the AO column indicates that the pin pair can be used as
an asynchronous output for all devices provided in this
package. Pairs with a note number in the AO column are
device dependent. They can have asynchronous outputs if
the pin pair are in the same CLB row and column in the
device. Numbers in this column refer to footnotes that indi-
cate which devices have pin pairs than can be asynchro-
nous outputs. The Other Functions column indicates
alternative function(s) not available when the pair is used as
a differential pair or differential clock.
Table 13: BG432 Differential Pin Pair Summary
XCV300E, XCV400E, XC600E
DS022-4 (v2.5) March 14, 2003
Production Product Specification
Pair
10
11
12
13
14
15
0
1
2
3
0
1
2
3
4
5
6
7
8
9
Total Outputs: 137, Asynchronous Output Pairs: 63
Bank
4
5
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
AK16
AL16
Global Differential Clock
A16
D17
D27
C27
A28
C26
A27
C25
D23
B24
A24
B22
D20
C20
D19
A19
D18
B17
Pin
P
IO LVDS
AH15
AL17
B16
C17
B29
B28
D26
B27
D25
D24
B25
C24
D22
C22
C21
B21
A20
B19
B18
C18
Pin
N
AO
NA
NA
NA
NA
1
√
√
2
√
√
1
1
√
√
√
√
√
√
1
1
IO_DLL_L86P
IO_DLL_L86N
IO_DLL_L16P
IO_DLL_L16N
Functions
VREF
VREF
VREF
VREF
VREF
VREF
Other
-
-
-
-
-
-
-
-
-
-
www.xilinx.com
1-800-255-7778
Table 13: BG432 Differential Pin Pair Summary
XCV300E, XCV400E, XC600E
Pair
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
Virtex™-E 1.8 V Field Programmable Gate Arrays
Bank
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
D15
D14
C12
C11
C10
D10
B16
B15
A13
B12
Pin
G3
M3
B8
B7
A6
D7
C6
D6
C5
D5
D3
D2
D1
E2
E1
H3
H1
K2
N4
F2
J2
L2
P
C17
C15
B14
B13
C13
D13
D12
B10
A15
Pin
G4
G2
M4
M2
C9
A8
C8
D8
B6
A5
B5
A4
B4
C2
E4
E3
F4
F3
H2
K4
K1
N3
J4
N
AO
NA
1
1
√
√
√
√
√
√
1
1
√
√
2
√
√
1
√
√
3
4
1
5
1
√
4
1
√
√
4
1
1
DIN, D0, BUSY
IO_LVDS_DLL
CS, WRITE
Functions
Module 4 of 4
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
VREF
Other
D1
D2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
31