XC3S1200E-5FTG256C Xilinx Inc, XC3S1200E-5FTG256C Datasheet - Page 160
![IC FPGA SPARTAN3E 1200K 256FTBGA](/photos/6/71/67101/pk053-256_sml.jpg)
XC3S1200E-5FTG256C
Manufacturer Part Number
XC3S1200E-5FTG256C
Description
IC FPGA SPARTAN3E 1200K 256FTBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S1200E-5FTG256C
Number Of Logic Elements/cells
19512
Number Of Labs/clbs
2168
Total Ram Bits
516096
Number Of I /o
190
Number Of Gates
1200000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-LBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Quantity
Price
Company:
Part Number:
XC3S1200E-5FTG256C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S1200E-5FTG256C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Company:
Part Number:
XC3S1200E-5FTG256C(XC3S1200E-4FTG256I)
Manufacturer:
XILINX
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DC and Switching Characteristics
IEEE 1149.1/1553 JTAG Test Access Port Timing
Table 123: Timing for the JTAG Test Access Port
160
Notes:
1.
Clock-to-Output Times
T
Setup Times
T
T
Hold Times
T
T
Clock Timing
T
T
F
TCKTDO
TDITCK
TMSTCK
TCKTDI
TCKTMS
CCH
CCL
TCK
The numbers in this table are based on the operating conditions set forth in
Symbol
TCK
TMS
TDI
TDO
(Input)
(Input)
(Input)
(Output)
The time from the falling transition on the TCK pin
to data appearing at the TDO pin
The time from the setup of data at the TDI pin to
the rising transition at the TCK pin
The time from the setup of a logic level at the TMS
pin to the rising transition at the TCK pin
The time from the rising transition at the TCK pin
to the point when data is last held at the TDI pin
The time from the rising transition at the TCK pin
to the point when a logic level is last held at the
TMS pin
The High pulse width at the TCK pin
The Low pulse width at the TCK pin
Frequency of the TCK signal
Description
T
TDITCK
T
TMSTCK
Figure 79: JTAG Waveforms
www.xilinx.com
T
TCKTDI
T
TCKTMS
Table
77.
T
TCKTDO
Min
1.0
7.0
7.0
All Speed Grades
0
0
5
5
-
T
CCH
1/F
TCK
DS312-3 (v3.8) August 26, 2009
Max
11.0
30
-
-
-
-
-
-
T
CCL
Product Specification
DS312-3_79_032409
Units
MHz
ns
ns
ns
ns
ns
ns
ns
R
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