XC3S500E-5FTG256C Xilinx Inc, XC3S500E-5FTG256C Datasheet - Page 198
![IC FPGA SPARTAN-3E 500K 256FTBGA](/photos/6/71/67101/pk053-256_sml.jpg)
XC3S500E-5FTG256C
Manufacturer Part Number
XC3S500E-5FTG256C
Description
IC FPGA SPARTAN-3E 500K 256FTBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet
1.XC3S100E-4VQG100C.pdf
(233 pages)
Specifications of XC3S500E-5FTG256C
Number Of Logic Elements/cells
10476
Number Of Labs/clbs
1164
Total Ram Bits
368640
Number Of I /o
190
Number Of Gates
500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-LBGA
For Use With
122-1536 - KIT STARTER SPARTAN-3E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S500E-5FTG256C
Manufacturer:
XILINX
Quantity:
368
Company:
Part Number:
XC3S500E-5FTG256C
Manufacturer:
Xilinx Inc
Quantity:
10 000
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Pinout Descriptions
Table 143: FT256 Package Pinout (Continued)
198
Bank
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
N.C. ( )
N.C. ( )
IO_L18N_3
IO_L18P_3
IO_L19N_3
IO_L19P_3
IP
IP
IO
IP
IP
IP
IP
IP
IP/VREF_3
IO/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S250E Pin Name
IO_L17N_3
IO_L17P_3
IO_L18N_3
IO_L18P_3
IO_L19N_3
IO_L19P_3
IP
IP
IO
IP
IP
IP
IP
IP
IP/VREF_3
IO/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S500E Pin Name
www.xilinx.com
IO_L17N_3
IO_L17P_3
IO_L18N_3
IO_L18P_3
IO_L19N_3
IO_L19P_3
IP
IP
IP
IP
IP
IP
IP
IP
IP/VREF_3
IP/VREF_3
VCCO_3
VCCO_3
VCCO_3
VCCO_3
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
XC3S1200E Pin Name
DS312-4 (v3.8) August 26, 2009
FT256
G10
Ball
A16
F11
M4
M3
G1
G6
M2
G7
G8
G9
P1
P2
R1
R2
D2
H1
K4
N3
N2
E2
K6
A1
B9
H2
H7
H8
H9
L4
F2
F5
J6
F6
Product Specification
250E: VREF(I/O)
500E: VREF(I/O)
1200E: INPUT
VREF(INPUT)
250E: N.C.
250E: N.C.
1200E: I/O
1200E: I/O
500E: I/O
500E: I/O
250E: I/O
500E: I/O
1200E:
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
VCCO
VCCO
VCCO
VCCO
VREF
Type
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
I/O
I/O
I/O
I/O
R
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