XC3S500E-5FTG256C Xilinx Inc, XC3S500E-5FTG256C Datasheet - Page 149

IC FPGA SPARTAN-3E 500K 256FTBGA

XC3S500E-5FTG256C

Manufacturer Part Number
XC3S500E-5FTG256C
Description
IC FPGA SPARTAN-3E 500K 256FTBGA
Manufacturer
Xilinx Inc
Series
Spartan™-3Er
Datasheet

Specifications of XC3S500E-5FTG256C

Number Of Logic Elements/cells
10476
Number Of Labs/clbs
1164
Total Ram Bits
368640
Number Of I /o
190
Number Of Gates
500000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-LBGA
For Use With
122-1536 - KIT STARTER SPARTAN-3E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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0
Miscellaneous DCM Timing
Table 110: Miscellaneous DCM Timing
DS312-3 (v3.8) August 26, 2009
Product Specification
Notes:
1.
2.
3.
DCM_RST_PW_MIN
DCM_RST_PW_MAX
DCM_CONFIG_LAG_TIME
This limit only applies to applications that use the DCM DLL outputs (CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV).
The DCM DFS outputs (CLKFX, CLKFX180) are unaffected.
This specification is equivalent to the Virtex-4 DCM_RESET specfication.This specification does not apply for Spartan-3E FPGAs.
This specification is equivalent to the Virtex-4 TCONFIG specification. This specification does not apply for Spartan-3E FPGAs.
R
Symbol
(1)
(2)
(3)
Minimum duration of a RST pulse width
Maximum duration of a RST pulse width
Maximum duration from V
configuration successfully completed (DONE pin goes
High) and clocks applied to DCM DLL
www.xilinx.com
Description
CCINT
applied to FPGA
DC and Switching Characteristics
Min
N/A
N/A
N/A
N/A
3
Max
N/A
N/A
N/A
N/A
-
seconds
seconds
minutes
minutes
CLKIN
cycles
Units
149

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