EP2S180F1020C4N Altera, EP2S180F1020C4N Datasheet - Page 60

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EP2S180F1020C4N

Manufacturer Part Number
EP2S180F1020C4N
Description
IC STRATIX II FPGA 180K 1020FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S180F1020C4N

Number Of Logic Elements/cells
179400
Number Of Labs/clbs
8970
Total Ram Bits
9383040
Number Of I /o
742
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
For Use With
544-1701 - DSP PRO KIT W/SII EP2S180N
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1884
EP2S180F1020C4N

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PLLs & Clock Networks
Figure 2–35. EP2S15 & EP2S30 Device I/O Clock Groups
2–52
Stratix II Device Handbook, Volume 1
IO_CLKH[7:0]
IO_CLKG[7:0]
8
8
8
IOE clocks have row and column block regions that are clocked by eight
I/O clock signals chosen from the 24 quadrant clock resources.
Figures 2–35
regions.
the Quadrant
the Quadrant
24 Clocks in
24 Clocks in
IO_CLKA[7:0]
IO_CLKF[7:0]
and
8
2–36
show the quadrant relationship to the I/O clock
IO_CLKB[7:0]
IO_CLKE[7:0]
8
the Quadrant
the Quadrant
24 Clocks in
24 Clocks in
8
Altera Corporation
8
8
I/O Clock Regions
IO_CLKC[7:0]
IO_CLKD[7:0]
May 2007

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