EP3SL150F1152C2N Altera, EP3SL150F1152C2N Datasheet - Page 252

• Manufacturer Part Number: EP3SL150F1152C2N
• Description: IC STRATX III FPGA 150K 1152FBGA
• Manufacturer: Altera
• Series: Stratix® IIIr

Specifications of EP3SL150F1152C2N

• Number Of Logic Elements/cells: 142500
• Number Of Labs/clbs: 5700
• Total Ram Bits: 6390
• Number Of I /o: 744
• Voltage - Supply: 0.86 V ~ 1.15 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1152-FBGA
• For Use With: 544-2568 - KIT DEVELOPMENT STRATIX III
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2409; EP3SL150F1152C2NES

1–252
Table 1–118. EP3SE80 Row Pins Output Timing Parameters (Part 1 of 3)
Stratix III Device Handbook, Volume 2
LVDS
LVDS_E_1R
LVDS_E_3R
MINI-LVDS
MINI-
LVDS_E_1R
MINI-
LVDS_E_3R
RSDS
RSDS_E_1R
RSDS_E_3R
DIFFERENTIAL
1.2-V
HSTL CLASS I
I/O Standard
—
—
—
—
—
—
—
—
—
4mA
6mA
8mA
Table 1–118
standards.
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
Clock
PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
PLL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
co
Industrial
lists the EP3SE80 row pins output timing parameters for differential I/O
2.744
0.931
3.136
1.333
3.118
1.315
2.744
0.931
3.136
1.333
3.118
1.315
2.744
0.931
3.136
1.333
3.118
1.315
3.162
1.359
3.148
1.345
3.144
1.341
Fast Model
Commercial
2.932
1.057
3.376
1.511
3.366
1.501
2.932
1.057
3.376
1.511
3.366
1.501
2.932
1.057
3.376
1.511
3.366
1.501
3.409
1.544
3.395
1.530
3.391
1.526
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
4.083 4.440 4.901 4.771 5.049 4.540 5.002 4.873 5.107
1.249 1.300 1.458 1.480 1.486 1.382 1.545 1.563 1.456
4.754 5.156 5.664 5.526 5.797 5.281 5.790 5.652 5.871
1.930 2.026 2.231 2.245 2.243 2.133 2.343 2.352 2.229
4.792 5.202 5.718 5.580 5.851 5.332 5.851 5.713 5.932
1.968 2.072 2.285 2.299 2.297 2.184 2.404 2.413 2.290
4.083 4.440 4.901 4.771 5.049 4.540 5.002 4.873 5.107
1.249 1.300 1.458 1.480 1.486 1.382 1.545 1.563 1.456
4.754 5.156 5.664 5.526 5.797 5.281 5.790 5.652 5.871
1.930 2.026 2.231 2.245 2.243 2.133 2.343 2.352 2.229
4.792 5.202 5.718 5.580 5.851 5.332 5.851 5.713 5.932
1.968 2.072 2.285 2.299 2.297 2.184 2.404 2.413 2.290
4.083 4.440 4.901 4.771 5.049 4.540 5.002 4.873 5.107
1.249 1.300 1.458 1.480 1.486 1.382 1.545 1.563 1.456
4.754 5.156 5.664 5.526 5.797 5.281 5.790 5.652 5.871
1.930 2.026 2.231 2.245 2.243 2.133 2.343 2.352 2.229
4.792 5.202 5.718 5.580 5.851 5.332 5.851 5.713 5.932
1.968 2.072 2.285 2.299 2.297 2.184 2.404 2.413 2.290
4.828 5.236 5.751 5.613 5.884 5.365 5.880 5.742 5.961
2.004 2.106 2.318 2.332 2.330 2.217 2.433 2.442 2.319
4.815 5.223 5.738 5.600 5.871 5.351 5.867 5.729 5.948
1.991 2.093 2.305 2.319 2.317 2.203 2.420 2.429 2.306
4.813 5.223 5.739 5.601 5.872 5.351 5.869 5.731 5.950
1.989 2.093 2.306 2.320 2.318 2.203 2.422 2.431 2.308
1.1 V
V
C2
CCL
=
1.1 V
V
C3
CCL
=
1.1 V
V
C4
CCL
=
1.1 V
V
CCL
=
C4L
0.9 V
V
CCL
© July 2010 Altera Corporation
=
1.1 V
V
CCL
I3
=
1.1 V
V
CCL
I4
=
I/O Timing
1.1 V
V
CCL
=
I4L
0.9 V
V
CCL
=
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns