EP1SGX40DF1020C6 Altera, EP1SGX40DF1020C6 Datasheet - Page 163

• Manufacturer Part Number: EP1SGX40DF1020C6
• Description: IC STRATIX GX FPGA 40K 1020-FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX40DF1020C6

• Number Of Logic Elements/cells: 41250
• Number Of Labs/clbs: 4125
• Total Ram Bits: 3423744
• Number Of I /o: 624
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Figure 4–58. Stratix GX IOE Structure
Altera Corporation
February 2005
Logic Array
Output B
Output A
Input B
Input A
OE
The IOEs are located in I/O blocks around the periphery of the Stratix GX
device. There are up to four IOEs per row I/O block and six IOEs per
column I/O block. The row I/O blocks drive row, column, or direct link
interconnects. The column I/O blocks drive column interconnects.
Figure 4–59
Figure 4–60
Output Register
Output Register
D
D
Q
Q
shows how a row I/O block connects to the logic array.
shows how a column I/O block connects to the logic array.
CLK
OE Register
OE Register
D
D
Q
Q
Input Register
Input Register
Stratix GX Device Handbook, Volume 1
D
D
Q
Q
Input Latch
D
ENA
Stratix GX Architecture
Q
4–97