EP1SGX40DF1020C6 Altera, EP1SGX40DF1020C6 Datasheet - Page 161
EP1SGX40DF1020C6
Manufacturer Part Number
EP1SGX40DF1020C6
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX40DF1020C6
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
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Altera Corporation
February 2005
pin. The I/O standards supported by any particular bank determines
what standards are possible for an external clock output driven by the fast
PLL in that bank.
Table 4–20
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
3.3-V PCI
3.3-V PCI-X
LVPECL
3.3-V PCML
LVDS
HyperTransport technology
Differential HSTL
Differential SSTL
3.3-V GTL
3.3-V GTL+
1.5V HSTL class I
1.5V HSTL class II
SSTL-18 class I
SSTL-18 class II
SSTL-2 class I
SSTL-2 class II
SSTL-3 class I
SSTL-3 class II
AGP (1× and 2× )
CTT
Table 4–20. Fast PLL Port Input Pin I/O Standards
shows the I/O standards supported by fast PLL input pins.
I/O Standard
Stratix GX Device Handbook, Volume 1
INCLK
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
v
Stratix GX Architecture
Input
PLLENABLE
v
v
4–95
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