EP2C50F672C7 Altera, EP2C50F672C7 Datasheet - Page 77
![IC CYCLONE II FPGA 50K 672-FBGA](/photos/6/73/67397/ep2c50f672c7_sml.jpg)
EP2C50F672C7
Manufacturer Part Number
EP2C50F672C7
Description
IC CYCLONE II FPGA 50K 672-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C50F672C7
Number Of Logic Elements/cells
50528
Number Of Labs/clbs
3158
Total Ram Bits
594432
Number Of I /o
450
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1443
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C50F672C7
Manufacturer:
ALTERA
Quantity:
853
Part Number:
EP2C50F672C7
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2C50F672C7N
Manufacturer:
ALTERA
Quantity:
855
Part Number:
EP2C50F672C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
February 2007
Note to
(1)
CONFIG_IO
SignalTap II
instructions
Table 3–1. Cyclone II JTAG Instructions (Part 2 of 2)
JTAG Instruction
Bus hold and weak pull-up resistor features override the high-impedance state of HIGHZ, CLAMP, and EXTEST.
Table
3–1:
00 0000 1101
Instruction Code
The Quartus II software has an Auto Usercode feature where you can
choose to use the checksum value of a programming file as the JTAG user
code. If selected, the checksum is automatically loaded to the USERCODE
register. In the Settings dialog box in the Assignments menu, click Device
& Pin Options, then General, and then turn on the Auto Usercode
option.
Allows configuration of I/O standards through the JTAG chain for
JTAG testing. Can be executed before, after, or during
configuration. Stops configuration if executed during configuration.
Once issued, the
reset the configuration device.
device is reconfigured.
Monitors internal device operation with the SignalTap II embedded
logic analyzer.
CONFIG_IO
Cyclone II Device Handbook, Volume 1
Description
nSTATUS
instruction holds
Configuration & Testing
is held low until the
nSTATUS
low to
3–3