EP2C8F256C7 Altera, EP2C8F256C7 Datasheet - Page 29
EP2C8F256C7
Manufacturer Part Number
EP2C8F256C7
Description
IC CYCLONE II FPGA 8K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet
1.EP2C5T144C8N.pdf
(168 pages)
Specifications of EP2C8F256C7
Number Of Logic Elements/cells
8320
Number Of Labs/clbs
516
Total Ram Bits
165888
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
Family Name
Cyclone® II
Number Of Logic Blocks/elements
8256
# I/os (max)
182
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
8256
Ram Bits
165888
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1453
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2C8F256C7
Manufacturer:
ATI/AMD
Quantity:
1
Company:
Part Number:
EP2C8F256C7
Manufacturer:
ALTERA
Quantity:
1 045
Part Number:
EP2C8F256C7
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EP2C8F256C7N
Manufacturer:
ALTERA
Quantity:
104
Part Number:
EP2C8F256C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
February 2007
Each global clock network has a clock control block to select from a
number of input clock sources (PLL clock outputs, CLK[] pins, DPCLK[]
pins, and internal logic) to drive onto the global clock network.
lists how many PLLs, CLK[] pins, DPCLK[] pins, and global clock
networks are available in each Cyclone II device. CLK[] pins are
dedicated clock pins and DPCLK[] pins are dual-purpose clock pins.
Figures 2–11
inputs, DPCLK[] pins, and clock control blocks.
EP2C5
EP2C8
EP2C15
EP2C20
EP2C35
EP2C50
EP2C70
Table 2–2. Cyclone II Device Clock Resources
Device
and
Number of
2–12
PLLs
2
2
4
4
4
4
4
show the location of the Cyclone II PLLs, CLK[]
Number of
CLK Pins
Cyclone II Device Handbook, Volume 1
16
16
16
16
16
8
8
DPCLK Pins
Number of
20
20
20
20
20
Cyclone II Architecture
8
8
Global Clock
Number of
Networks
Table 2–2
16
16
16
16
16
8
8
2–17