EP2S60F672I4N Altera, EP2S60F672I4N Datasheet - Page 178

• Manufacturer Part Number: EP2S60F672I4N
• Description: IC STRATIX II FPGA 60K 672-FBGA
• Manufacturer: Altera
• Series: Stratix® IIr

Specifications of EP2S60F672I4N

• Number Of Logic Elements/cells: 60440
• Number Of Labs/clbs: 3022
• Total Ram Bits: 2544192
• Number Of I /o: 492
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 672-FBGA
• For Use With: 544-1700 - DSP KIT W/STRATIX II EP2S60N544-1697 - NIOS II KIT W/STRATIX II EP2S60N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1916; EP2S60F672I4N

Timing Model
5–42
Stratix II Device Handbook, Volume 1
t
t
t
t
t
t
t
t
t
t
t
t
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
C I N
C O U T
P L L C I N
P L L C O U T
Table 5–44. EP2S15 Column Pins Regional Clock Timing Parameters
Table 5–45. EP2S15 Column Pins Global Clock Timing Parameters
Table 5–46. EP2S15 Row Pins Regional Clock Timing Parameters
Parameter
Parameter
Parameter
Industrial
Industrial
Industrial
-0.053
-0.063
-0.109
-0.104
1.445
1.288
0.104
1.419
1.262
0.094
1.232
1.237
Minimum Timing
Minimum Timing
Minimum Timing
EP2S15 Clock Timing Parameters
Tables 5–44
EP2S15 devices.
1.487
1.322
0.092
-0.073
Commercial
Commercial
Commercial
-0.063
-0.122
-0.117
1.512
1.347
0.102
1.288
1.293
though
5–47
2.456
2.214
0.326
0.084
-3 Speed
-3 Speed
-3 Speed
show the maximum clock timing parameters for
Grade
Grade
Grade
-0.007
-0.011
2.487
2.245
0.336
0.094
2.144
2.140
2.813
2.535
0.363
0.085
-4 Speed
-4 Speed
-4 Speed
Grade
Grade
Grade
-0.021
-0.025
2.848
2.570
0.373
0.095
2.454
2.450
3.273
2.949
0.414
0.09
-5 Speed
-5 Speed
-5 Speed
Altera Corporation
Grade
Grade
Grade
-0.037
-0.042
3.309
2.985
0.424
2.848
2.843
0.1
April 2011
Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns