EP2C35U484C6 Altera, EP2C35U484C6 Datasheet - Page 27

IC CYCLONE II FPGA 33K 484-UBGA

EP2C35U484C6

Manufacturer Part Number
EP2C35U484C6
Description
IC CYCLONE II FPGA 33K 484-UBGA
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C35U484C6

Number Of Logic Elements/cells
33216
Number Of Labs/clbs
2076
Total Ram Bits
483840
Number Of I /o
322
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-UBGA
For Use With
P0301 - DE2 CALL FOR ACADEMIC PRICING544-1733 - PCI KIT W/CYCLONE II EP2C35N
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2112

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Altera Corporation
February 2007
Register
Chain
Local
Interconnect
Direct Link
Interconnect
R4
Interconnect
R24
Interconnect
C4
Interconnect
C16
Interconnect
Table 2–1. Cyclone II Device Routing Scheme (Part 1 of 2)
Source
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C16 column interconnects span a length of 16 LABs and provide the
fastest resource for long column connections between LABs, M4K
memory blocks, embedded multipliers, and IOEs. C16 column
interconnects drive to other row and column interconnects at every
fourth LAB. C16 column interconnects drive LAB local interconnects via
C4 and R4 interconnects and do not drive LAB local interconnects
directly. C16 interconnects can drive R24, R4, C16, and C4 interconnects.
Device Routing
All embedded blocks communicate with the logic array similar to
LAB-to-LAB interfaces. Each block (for example, M4K memory,
embedded multiplier, or PLL) connects to row and column interconnects
and has local interconnect regions driven by row and column
interconnects. These blocks also have direct link interconnects for fast
connections to and from a neighboring LAB.
Table 2–1
v
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v
shows the Cyclone II device’s routing scheme.
v
v
v
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Destination
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v
Cyclone II Device Handbook, Volume 1
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v
Cyclone II Architecture
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2–15
v

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