EPF81500AQC240-2 Altera, EPF81500AQC240-2 Datasheet - Page 32
![IC FLEX 8000A FPGA 16K 240-PQFP](/photos/6/72/67260/544-240-pqfp_sml.jpg)
EPF81500AQC240-2
Manufacturer Part Number
EPF81500AQC240-2
Description
IC FLEX 8000A FPGA 16K 240-PQFP
Manufacturer
Altera
Series
FLEX 8000r
Datasheet
1.EPF8282ATC100-3.pdf
(62 pages)
Specifications of EPF81500AQC240-2
Number Of Logic Elements/cells
1296
Number Of Labs/clbs
162
Number Of I /o
181
Number Of Gates
16000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-MQFP, 240-PQFP
Family Name
FLEX 8000
Number Of Usable Gates
16000
Number Of Logic Blocks/elements
1296
# Registers
1500
# I/os (max)
181
Frequency (max)
125MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
5V
Logic Cells
1296
Ram Bits
8
Device System Gates
16000
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Total Ram Bits
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2249
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPF81500AQC240-2
Manufacturer:
ALTERA
Quantity:
135
Part Number:
EPF81500AQC240-2
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
FLEX 8000 Programmable Logic Device Family Data Sheet
32
Timing Model
Figure 18. Output Drive Characteristics of EPF8282AV Devices
The continuous, high-performance FastTrack Interconnect routing
structure ensures predictable performance and accurate simulation and
timing analysis. This predictable performance contrasts with that of
FPGAs, which use a segmented connection scheme and hence have
unpredictable performance. Timing simulation and delay prediction are
available with the MAX+PLUS II Simulator and Timing Analyzer, or with
industry-standard EDA tools. The Simulator offers both pre-synthesis
functional simulation to evaluate logic design accuracy and post-
synthesis timing simulation with 0.1-ns resolution. The Timing Analyzer
provides point-to-point timing delay information, setup and hold time
prediction, and device-wide performance analysis.
Tables 17
symbols.
through
Typical I
Output
Current (mA)
O
20
describe the FLEX 8000 timing parameters and their
100
75
50
25
1
Output Voltage (V)
I
OL
I
2
OH
V
Room Temperature
CC
= 3.3 V
3
Altera Corporation
4