EP2C20F256C6N Altera, EP2C20F256C6N Datasheet - Page 158

• Manufacturer Part Number: EP2C20F256C6N
• Description: IC CYCLONE II FPGA 20K 256-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C20F256C6N

• Number Of Logic Elements/cells: 18752
• Number Of Labs/clbs: 1172
• Total Ram Bits: 239616
• Number Of I /o: 152
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 256-FBGA
• For Use With: P0528 - BOARD DEV DE1 ALTERA544-1736 - CYCLONE II STARTER KIT EP2C20N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-1660

Duty Cycle Distortion
Figure 5–9. DCD Measurement Technique for Non-DDIO (Single-Data Rate) Outputs
5–68
Cyclone II Device Handbook, Volume 1
clk
DCD Measurement Techniques
DCD is measured at an FPGA output pin driven by registers inside the
corresponding I/O element (IOE) block. When the output is a single data
rate signal (non-DDIO), only one edge of the register input clock (positive
or negative) triggers output transitions
present on the input clock signal, or caused by the clock input buffer, or
different input I/O standard, does not transfer to the output signal.
However, when the output is a double data rate input/output (DDIO)
signal, both edges of the input clock signal (positive and negative) trigger
output transitions
clock and the input clock buffer affect the output DCD.
IOE
(T/2 – D1) / T (the low percentage boundary)
(T/2 + D2) / T (the high percentage boundary)
(Figure
DFF
D
5–10). Therefore, any distortion on the input
Q
(Figure
5–9). Therefore, any DCD
Altera Corporation
output
February 2008