Z8927320VSG Zilog, Z8927320VSG Datasheet - Page 35

• Manufacturer Part Number: Z8927320VSG
• Description: DSP 20MHZ 16-BIT W/ A/D 44-PLCC
• Manufacturer: Zilog
• Series: Z892x3r
• Type: Fixed Pointr

Specifications of Z8927320VSG

• Interface: SPI, 3-Wire Serial
• Clock Rate: 20MHz
• Non-volatile Memory: OTP (16 kB)
• On-chip Ram: 1kB
• Voltage - I/o: 5.00V
• Voltage - Core: 5.00V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-LCC (J-Lead)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ZiLOG
Port1Ñ8-Bit Programmable I/O
Bank15/EXT1 is the Port1 control register. The MSB is the
Port1 direction control. Port1 data is accessed as the LSB
of EXT5 in Banks 0, 1, or 5. The Port1 pins can also be
mapped to internal functions. When INT2, CLKOUT, UI0
DS000202-DSP0599
Port Pin
P1.0/INT2
P1.1/CLKOUT
P1.2/SDI
P1.3/SDO
P1.4/SS
P1.5/SCLK
P1.6/UI0
P1.7/UI1
IF
Bank15/EXT1 Bit 3 = 1
Bank15/EXT1 Bit 5 = 1
Bank15/EXT4 Bit 0 = 1
Bank15/EXT4 Bit 0 = 1
Bank15/EXT4 Bit 0 = 1
Bank15/EXT4 Bit 0 = 1
Bank13/EXT1 Bits [2,1] = 10, or
Bank14/EXT1 Bits [2,1] = 10
Bank13/EXT1 Bits [2,1] = 11, or
Bank14/EXT1 Bits [2,1] = 11
Table 16. Port1 Bit Function Allocation
and UI1, or the SPI are enabled, they use Port1 pins. The
44-pin packages do not feature Port1 pins, however, Port1
and its internal functions can be mapped to the MSB of the
ED Bus/Port0 pins. See bits 2–0 of Bank15/EXT1.
16-Bit Digital Signal Processors with A/D Converter
Condition
Enable INT2
Enable CLKOUT
Enable SPI
Enable SPI
Enable SPI
Enable SPI
Enable UI0
Enable UI1
Then
INT2
CLKOUT
SDI
SDO
SS
SCLK
UI0
UI1
Z89223/273/323/373
Else
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
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