ADSP-BF527KBCZ-6C2 Analog Devices Inc, ADSP-BF527KBCZ-6C2 Datasheet - Page 18

IC DSP 16BIT 600MHZ 289CSPBGA

ADSP-BF527KBCZ-6C2

Manufacturer Part Number
ADSP-BF527KBCZ-6C2
Description
IC DSP 16BIT 600MHZ 289CSPBGA
Manufacturer
Analog Devices Inc
Series
Blackfin®r
Type
Fixed Pointr

Specifications of ADSP-BF527KBCZ-6C2

Package / Case
289-CSPBGA
Interface
DMA, Ethernet, I²C, PPI, SPI, SPORT, UART, USB
Clock Rate
600MHz
Non-volatile Memory
ROM (32 kB)
On-chip Ram
132kB
Voltage - I/o
1.8V, 2.5V, 3.3V
Voltage - Core
1.10V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Svhc
No SVHC (18-Jun-2010)
Cache On Chip L1/l2 Memory
48KB
Core Frequency Typ
600MHz
Dsp Type
Core
External Supported Memory
SDRAM, SRAM, FLASH, ROM
Interface Type
SPI, Parallel, 2 Wire
Rohs Compliant
Yes
Mmac
1200
No. Of Pins
289
Package
289CSP-BGA
Maximum Speed
600 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ADZS-BF527-MPSKIT - BOARD EVAL MEDIA PLAYER BF527ADZS-BF527-EZLITE - BOARD EVAL ADSP-BF527
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADSP-BF527KBCZ-6C2
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Table 7. Register 3 Right-Channel DAC Volume
Table 8. Register 4 Analog Audio Path
Bit Name
RLHPBOTH
RZCEN
RHPVOL [6:0]
Bit Name
MICBOOST2
SIDEATT[1:0]
SIDETONE
DACSEL
BYPASS
INSEL
MUTEMIC
MICBOOST
ADSP-BF522C/ADSP-BF523C/ADSP-BF524C/ADSP-BF525C/ADSP-BF526C/ADSP-BF527C
Bits
B8
B7
B[6:0] Right-channel headphone volume control
Bits
B8
B[7:6] Microphone sidetone gain control
B5
B4
B3
B2
B1
B0
Description
Right-to-left headphone volume load control
Right-channel zero cross detect enable
Description
Additional microphone amplifier gain booster control
Sidetone enable. Allow attenuated microphone
signal to be mixed at device output terminal
DAC select—allow DAC output to be
mixed at device output terminal
Bypass select—allow line input signal to be mixed
at device output terminal
Line input or microphone input select to ADC
Microphone mute control to ADC
Primary microphone amplifier gain booster control
Rev. A | Page 18 of 36 | March 2010
Settings
0 = disable simultaneous loading of right-channel
headphone volume data to left-channel register (default)
1 = enable simultaneous loading of right-channel
headphone volume data to left-channel register
0 = disable (default)
1 = enable
000 0000 to 010 1111 = mute
011 0000 = –73 dB
111 1001 = 0 dB (default)
… 1 dB steps up to
111 1111 = +6 dB
Settings
0 = 0 dB (default)
1 = 20 dB
00 = –6 dB (default)
01 = –9 dB
10 = –12 dB
11 = –15 dB
0 = sidetone disable (default)
1 = sidetone enable
0 = do not select DAC (default)
1 = select DAC
0 = bypass disable
1 = bypass enable (default)
0 = line input select to ADC (default)
1 = microphone input select to ADC
0 = mute on data path to ADC disable
1 = mute on data path to ADC enable (default)
0 = 0 dB (default)
1 = 20 dB

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