XC95288XL-10BGG256C Xilinx Inc, XC95288XL-10BGG256C Datasheet - Page 17

• Manufacturer Part Number: XC95288XL-10BGG256C
• Description: IC CPLD 288MCELL 10NS 256-PBGA
• Manufacturer: Xilinx Inc
• Series: XC9500XLr

Specifications of XC95288XL-10BGG256C

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Logic Elements/blocks: 16
• Number Of Macrocells: 288
• Number Of Gates: 6400
• Number Of I /o: 192
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 256-BGA
• Features: Low Power
• Voltage: 3.0 V ~ 3.6 V
• Memory Type: CMOS
• Number Of Logic Elements/cells: 16
• Cpld Type: FLASH
• No. Of Macrocells: 288
• No. Of I/o's: 192
• Propagation Delay: 10ns
• Global Clock Setup Time: 6.5ns
• Frequency: 100MHz
• Supply Voltage Range: 3V To 3.6V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Further Reading
Further information on the XC9500XL CPLD family can be found at:
http://www.xilinx.com/support/documentation/xc9500xl.htm.
This site includes:
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Revision History
The following table shows the revision history for this document.
DS054 (v2.5) May 22, 2009
Product Specification
09/28/98
10/02/98
02/03/99
04/02/99
06/07/99
06/07/99
01/25/02
02/07/03
08/02/04
11/11/04
07/15/05
03/22/06
07/25/06
04/03/07
11/20/08
05/22/09
Pinouts contained in the density-specific data sheets
Package electrical and thermal characteristics in UG112, Device Package User Guide
Termination, logic thresholds, power sequencing, and slew rate information in UG445, CPLD IO User Guide
Timing model in XAPP111, Using the XC9500XL Timing Model
Good design practices in XAPP784, Bulletproof CPLD Design Practices
Package drawings and dimensions at
Date
R
Version
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
Initial Xilinx release.
Figure 1 correction.
Included hot socket reference; revised layout; BGA package change for XC95288XL.
Minor typesetting corrections.
Minor typesetting corrections.
Added CS280 package.
Added DS054 data sheet number. Added 44-pin VQFP package. Updated Device Family
table.
Added "Further Reading" section.
Added Pb-free documentation.
Changes to package designations in Table 2 on page 2.
Move to Product Specification.
Add Warranty Disclaimer.
Added Subthreshold State to Figure 17 and Table 5, page 16.
Added warning on programming temperature range, page 13.
Updated "Further Reading" section.
Updated description of power sequencing for 5V tolerance in "5V Tolerant I/Os" section.
http://www.xilinx.com/support/documentation/package_specifications.htm
www.xilinx.com
XC9500XL High-Performance CPLD Family Data Sheet
Revision
17