XC95288XL-10BGG256C Xilinx Inc, XC95288XL-10BGG256C Datasheet - Page 11

IC CPLD 288MCELL 10NS 256-PBGA

XC95288XL-10BGG256C

Manufacturer Part Number
XC95288XL-10BGG256C
Description
IC CPLD 288MCELL 10NS 256-PBGA
Manufacturer
Xilinx Inc
Series
XC9500XLr

Specifications of XC95288XL-10BGG256C

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
16
Number Of Macrocells
288
Number Of Gates
6400
Number Of I /o
192
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
256-BGA
Features
Low Power
Voltage
3.0 V ~ 3.6 V
Memory Type
CMOS
Number Of Logic Elements/cells
16
Cpld Type
FLASH
No. Of Macrocells
288
No. Of I/o's
192
Propagation Delay
10ns
Global Clock Setup Time
6.5ns
Frequency
100MHz
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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I/O Block
The I/O Block (IOB) interfaces between the internal logic
and the device user I/O pins. Each IOB includes an input
The input buffer is compatible with 5V CMOS, 5V TTL, 3.3V
CMOS, and 2.5V CMOS signals. The input buffer uses the
internal 3.3V voltage supply (V
input thresholds are constant and do not vary with the
DS054 (v2.5) May 22, 2009
Product Specification
Macrocell
(Inversion in
AND-array)
R
I/O/GTS1
I/O/GTS2
I/O/GTS3
I/O/GTS4
Product Term OE
To FastCONNECT
Switch Matrix
CCINT
Figure 10: I/O Block and Output Enable Capability
Global OE 4
Global OE 3
Global OE 1
Global OE 2
) to ensure that the
PTOE
OUT
www.xilinx.com
buffer, output driver, output enable selection multiplexer,
and user programmable ground control. See
details.
V
(50 mV typical) to help reduce system noise for input signals
with slow rise or fall edges.
XC9500XL High-Performance CPLD Family Data Sheet
CCIO
Macrocells
To other
voltage. Each input buffer provides input hysteresis
1
0
Available in XC95144XL
and XC95288XL
Slew Rate
Control
Programmable
Ground
User-
Bus-Hold
I/O Block
DS054_10_042101
I/O
Figure 10
for
11

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