EPM3032ATC44-7 Altera, EPM3032ATC44-7 Datasheet - Page 28
![IC MAX 3000A CPLD 32 44-TQFP](/photos/6/70/67053/544-44-tqfp_sml.jpg)
EPM3032ATC44-7
Manufacturer Part Number
EPM3032ATC44-7
Description
IC MAX 3000A CPLD 32 44-TQFP
Manufacturer
Altera
Series
MAX® 3000Ar
Datasheet
1.EPM3032ATC44-10N.pdf
(46 pages)
Specifications of EPM3032ATC44-7
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
2
Number Of Macrocells
32
Number Of Gates
600
Number Of I /o
34
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Voltage
3.0 V ~ 3.6 V
Memory Type
EEPROM
Number Of Logic Elements/cells
2
Family Name
MAX 3000A
# Macrocells
32
Number Of Usable Gates
600
Frequency (max)
166.67MHz
Propagation Delay Time
7.5ns
Number Of Logic Blocks/elements
2
# I/os (max)
34
Operating Supply Voltage (typ)
3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1153
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM3032ATC44-7
Manufacturer:
ALTERA
Quantity:
30
Part Number:
EPM3032ATC44-7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EPM3032ATC44-7N/I44-10N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
MAX 3000A Programmable Logic Device Family Data Sheet
28
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
t
f
Symbol
PD1
PD2
SU
H
CO1
CH
CL
ASU
AH
ACO1
ACH
ACL
CPPW
CNT
CNT
ACNT
ACNT
Table 16. EPM3032A External Timing Parameters
Input to non–
registered output
I/O input to non–
registered output
Global clock setup
time
Global clock hold time
Global clock to output
delay
Global clock high time
Global clock low time
Array clock setup time
Array clock hold time
Array clock to output
delay
Array clock high time
Array clock low time
Minimum pulse width
for clear and preset
Minimum global clock
period
Maximum internal
global clock frequency
Minimum array clock
period
Maximum internal
array clock frequency
Parameter
Tables 16
EPM3256A, and EPM3512A timing information.
C1 = 35 pF
(2)
C1 = 35 pF
(2)
(2)
(2)
C1 = 35 pF
(2)
(2)
C1 = 35 pF
(2)
(3)
(2)
(2),
(2)
(2),
Conditions
(4)
(4)
through
227.3
227.3
23
Min
2.9
0.0
1.0
2.0
2.0
1.6
0.3
1.0
2.0
2.0
2.0
show EPM3032A, EPM3064A, EPM3128A,
–4
Note (1)
Max
4.5
4.5
3.0
4.3
4.4
4.4
138.9
138.9
Speed Grade
Min
3.0
3.0
4.7
0.0
1.0
2.5
0.5
1.0
3.0
3.0
3.0
–7
Max
7.5
7.5
5.0
7.2
7.2
7.2
103.1
103.1
Min
6.3
0.0
1.0
4.0
4.0
3.6
0.5
1.0
4.0
4.0
4.0
Altera Corporation
–10
Max
6.7
9.4
9.7
9.7
10
10
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns