EPM9320LC84-15 Altera, EPM9320LC84-15 Datasheet - Page 15

• Manufacturer Part Number: EPM9320LC84-15
• Description: IC MAX 9000 CPLD 320 84-PLCC
• Manufacturer: Altera
• Series: MAX® 9000r

Specifications of EPM9320LC84-15

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 15.0ns
• Voltage Supply - Internal: 4.75 V ~ 5.25 V
• Number Of Logic Elements/blocks: 20
• Number Of Macrocells: 320
• Number Of Gates: 6000
• Number Of I /o: 60
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 84-PLCC
• Voltage: 3.3V/5V
• Memory Type: EEPROM
• Number Of Logic Elements/cells: 20
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 544-2362-5

Altera Corporation
A row interconnect channel can be fed by the output of the macrocell
through a 4-to-1 multiplexer that the macrocell shares with three column
channels. If the multiplexer is used for a macrocell-to-row connection, the
three column signals can access another row channel via an additional
3-to-1 multiplexer. Within any LAB, the multiplexers provide all
48 column channels with access to 32 row channels.
Row-to-I/O Cell Connections
Figure 8
and IOCs. An input signal from an IOC can drive two separate row
channels. When an IOC is used as an output, the signal is driven by a
10-to-1 multiplexer that selects the row channels. Each end of the row
channel feeds up to eight IOCs on the periphery of the device.
Figure 8. MAX 9000 Row-to-IOC Connections
Column-to-I/O Cell Connections
Each end of a column channel has up to 10 IOCs (see
signal from an IOC can drive two separate column channels. When an IOC
is used as an output, the signal is driven by a 17-to-1 multiplexer that
selects the column channels.
Row FastTrack
Interconnect
illustrates the connections between row interconnect channels
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MAX 9000 Programmable Logic Device Family Data Sheet
96
96
Each IOC can drive up to
two row channels.
10
10
Each IOC is driven by
a 10-to-1 multiplexer.
IOC1
IOC8
Figure
9). An input
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