ATF1508RE-7AU100 Atmel, ATF1508RE-7AU100 Datasheet - Page 2

IC CPLD EE 128MC 5NS 100-TQFP

ATF1508RE-7AU100

Manufacturer Part Number
ATF1508RE-7AU100
Description
IC CPLD EE 128MC 5NS 100-TQFP
Manufacturer
Atmel
Series
ATF1508REr
Datasheets

Specifications of ATF1508RE-7AU100

Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Macrocells
128
Number Of I /o
80
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Features
Programmable
Voltage
1.8V, 2.5V, 3.3V
Memory Type
EEPROM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATF1508RE-7AU100
Manufacturer:
Atmel
Quantity:
10 000
Enhanced Features
1. Description
2
ATF1508RE
The ATF1508RE is a high-performance, high-density complex programmable logic device
(CPLD) that utilizes Atmel’s proven electrically-erasable memory technology. With 128 logic
macrocells and up to 84 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and
classic PLDs. The ATF1508RE’s enhanced routing switch matrices increase usable gate count
and the odds of successful pin-locked design modifications.
The ATF1508RE has up to 80 bi-directional I/O pins, four dedicated input pins, 1 internal voltage
regulator supply input pin (VCCIRI), 6 I/O VCC pins (VCCIOA and VCCIOB), 8 ground pins
(GND and 1 internal voltage regulator output pin (VCCIR0). Each dedicated input pin can also
serve as a global control signal, register clock, register reset or output enable. Each of these
control signals can be selected for use individually within each macrocell.
show the pin assignments for the 100-lead TQFP and 132-ball CBGA packages, respectively.
Improved Connectivity (Additional Feedback Routing, Alternate Input Routing)
Output Enable Product Terms
Outputs Can Be Configured for High or Low Drive
Combinatorial Output with Registered Feedback and Vice Versa within each Macrocell
Three Global Clock Pins
Fast Registered Input from Product Term
Pull-up Option on TMS and TDI JTAG Pins
OTF (On-the-Fly) Reconfiguration Mode
DRA (Direct Reconfiguration Access)
Figures 1-1 and 1-2
3682A–PLD–10/08

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