ATF1508RE-7AU100 Atmel, ATF1508RE-7AU100 Datasheet - Page 10
![IC CPLD EE 128MC 5NS 100-TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
ATF1508RE-7AU100
Manufacturer Part Number
ATF1508RE-7AU100
Description
IC CPLD EE 128MC 5NS 100-TQFP
Manufacturer
Atmel
Series
ATF1508REr
Specifications of ATF1508RE-7AU100
Programmable Type
In System Programmable (min 10K program/erase cycles)
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Macrocells
128
Number Of I /o
80
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Features
Programmable
Voltage
1.8V, 2.5V, 3.3V
Memory Type
EEPROM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
2.6
3. Power Management
4. Security Feature
10
On-Chip Voltage Regulator
ATF1508RE
The ATF1508RE CPLD device has a built-in Internal Voltage Regulator that converts an exter-
nal 3.3V supply to internal 1.8V core supply. The 1.8V output of the internal voltage regulator is
also connected to the VCCIRO pin (Pin 39 for 100-pin TQFP) so that external bypass capacitors
can be used to minimize noise. The recommended bypass capacitor values for the VCCIRO pin
are 2.2 µF or 4.7 µF X7R, and 470 pF or 1 nF NPO type. These capacitors will help filter out
noise at the output of the internal voltage regulator, which is important for the ATF1508RE to
operate properly (see
The ATF1508RE CPLD also supports MultiVolt I/O interface feature, which allows seamless
interface to other devices at 1.5V, 1.8V, 2.5V, or 3.3V logic levels. The ATF1508RE device has
two I/O banks, each bank can be supplied with an independent VCCIO (VCCIOA or VCCIOB).
Figure 2-3.
Unlike conventional CPLDs with sense amplifiers, the ATF1508RE is designed using low-power
full CMOS design techniques. This enables the ATF1508RE to achieve extremely low power
consumption over the full operating frequency spectrum.
The ATF1508RE also has an optional power-down mode. In this mode, current drops to below
100 µA. When the power-down option is selected, either PD1 or PD2 pins (or both) can be used
to power down the part. When enabled, the device goes into power-down when either PD1 or
PD2 is high. In the power-down mode, all internal logic signals are latched and held, as are any
enabled outputs.
All pin transitions are ignored until the PD pin is brought low. When the power-down feature is
enabled, the PD1 or PD2 pin cannot be used as a logic input or output. However, the pin’s mac-
rocell may still be used to generate buried foldback and cascade logic signals.
All power-down AC characteristic parameters are computed from external input or I/O pins.
A fuse is provided to prevent unauthorized copying of the ATF1508RE fuse patterns. Once
enabled, fuse reading or verification is inhibited. However, the 16-bit User Electronic Signature
remains accessible. To reset this feature, the entire memory array in the device must be erased.
ATF1508RE
Logic
Core
On-Chip Voltage Regulator
Figure
1.8V
2-3).
470 pF
1 nF
or
Internal
Voltage
Regulator
2.2 µF
4.7 µF
or
Pin 91 for 100 TQFP
Pin 39 for 100 TQFP
V
V
CCIRO
CCIRI
= 3.3V
= 1.8V
3682A–PLD–10/08