MT9075BP1 Zarlink, MT9075BP1 Datasheet - Page 70
MT9075BP1
Manufacturer Part Number
MT9075BP1
Description
PB FREE E1 SINGLE CHIP TRANSCEIVER
Manufacturer
Zarlink
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One Second Status (Page 09H)
10H
(Table 75)
11H
(Table 76)
12H
(Table 77)
13H
(Table 78)
14H
(Table 79)
15H
(Table 80)
16H
(Table 81)
17H - 1FH
(A
4
3
2
1
0
4
Address
A
3
A
2
A
1
A
0
)
RRST
MSB Latched
E-bit Error Count
LSB Latched E-bit Error Count
Latched Errored Frame Alignment Signal
Count
MSB Latched BPV Error Count
LSB Latched BPV Error Count
MSB Latched CRC Error Count
LSB Latched CRC Error Count
TTST
LTSL
(0)
(0)
(0)
---
---
- - -
Table 74 - One Second Status (Page 09H)
Table 73 - Per Time Slot Control Word
Register
Local Time Slot Loopback. If one, the corresponding transmit time slot
is looped to the corresponding receive time slot. This transmit time slot
will also be present on the transmit PCM 30 stream. If zero, this loopback
is disabled.
Transmit Test. If one and control bit ADSEQ (page 02H, address 13H)
is one, the A-law digital milliwatt will be transmitted in the corresponding
PCM 30 time slot. When one and ADSEQ is zero, a Pseudo-Random Bit
Sequence (PRBS 2
time slot. More than one time slot may be activated at once. If zero,
neither of these test signals will be connected to the corresponding time
slot.
Receive Test. If one and control bit ADSEQ (page 02H, address 13H) is
one, the A-law digital milliwatt will be transmitted in the corresponding
DSTo time slot. When one and ADSEQ is zero, a Pseudo Random Bit
Sequence (PRBS 2
time slot. This receiver circuit will synchronize to the transmit PRBS
signal and perform a bit comparison of the two sequences. If zero,
neither of these test signals will be connected to the corresponding time
slot.
Unused.
Unused.
Zarlink Semiconductor Inc.
(Page 07H and 08H)
MT9075B
70
15
15
-1) will be transmitted is the corresponding PCM 30
-1) receiver will be connected to the corresponding
LEC9-LEC8
LEC7-LEC0
LEFAS7-LEFAS0
LBPV15-LBPV8
LBPV7-LBPV0
LCC9-LCC8
LCC7-LCC0
Unused.
Names
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