MT9075BP1 Zarlink, MT9075BP1 Datasheet - Page 52
MT9075BP1
Manufacturer Part Number
MT9075BP1
Description
PB FREE E1 SINGLE CHIP TRANSCEIVER
Manufacturer
Zarlink
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7-3
Bit
2
1
0
LOS/LOF
ADSEQ
GCI/ST
Name
(0)
(0)
(0)
--
Unused.
Loss of Signal or Loss of Frame Selection. If one, pin LOS (pin 61 in
PLCC, 57 in MQFP) will go high when a loss of signal state exits (criteria as
per LLOS status bit on page 03H address 18H). If low, pin LOS will go high
when either a loss of signal (LLOST =1) or a loss of basic frame alignment
state exits (bit SYNC on page 03H address 10H is zero).
Digital Milliwatt or Digital Test Sequence. If one, the A-law digital milliwatt
analog test sequence will be selected by the Per Time Slot Control bits
TTST and RTST (on page 07H and 08H). If zero, the PRBS 2
rate test sequence will be selected by the Per Time Slot Control bits TTST
and RTST. The PRBS generator is reset whenever this bit is set to 1.
GCI or ST-BUS Frame Pulse. If one, the MT9075B will transmit or receive
a GCI frame pulse on pin F0b (pin 46 in PLCC, 34 in MQFP). If zero, the
MT9075B will transmit or receive an ST-BUS frame pulse on F0b.
Table 29 - Access Control Word
(Page 02H, Address 13H)
Zarlink Semiconductor Inc.
MT9075B
52
Functional Description
15
Data Sheet
-1 bit error
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