MAX5541CSA+T Maxim Integrated Products, MAX5541CSA+T Datasheet - Page 8

• Manufacturer Part Number: MAX5541CSA+T
• Description: IC DAC 16BIT MONOTONIC SER 8SOIC
• Manufacturer: Maxim Integrated Products

Specifications of MAX5541CSA+T

• Settling Time: 1µs
• Number Of Bits: 16
• Data Interface: Serial
• Number Of Converters: 1
• Voltage Supply Source: Single Supply
• Power Dissipation (max): 1.5mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 3. Typical Operating Circuit
Low-Cost, +5V, Serial-Input,
Voltage-Output, 16-Bit DAC
The external buffer amplifier’s gain-bandwidth product
is important because it increases the settling time by
adding another time constant to the output response.
The effective time constant of two cascaded systems,
each with a single time-constant response, is approxi-
mately the root square sum of the two time constants.
The DAC output’s time constant is 1µs/12 = 83ns,
ignoring the effect of additional capacitance. If the time
constant of an external amplifier with 1MHz bandwidth
is 1/2π (1MHz) = 159ns, then the effective time con-
stant of the combined system is:
This suggests that the settling time to within 1/2LSB of
the final output voltage, including the external buffer
amplifier, will be approximately 12
The digital interface for the 16-bit DAC is based on a 3-
wire standard that is SPI/QSPI/MICROWIRE–compati-
ble. The three digital inputs (CS, DIN, and SCLK) load
the digital input data serially into the DAC.
All of the digital inputs include Schmitt-trigger buffers to
accept slow-transition interfaces. This means that opto-
couplers can interface directly to the MAX5541 without
additional external logic. The digital inputs are TTL/
CMOS-logic compatible.
Figure 3 shows the MAX5541 configured for unipolar
operation with an external op amp. The op amp is set for
unity gain, and Table 1 shows the codes for this circuit.
8
_______________________________________________________________________________________
Digital Inputs and Interface Logic




( )
MC68XXXX
83ns
2
+
PCS0
MOSI
SCLK
(
159ns
Unipolar Configuration
)
2




=
180ns
✕
CS
DIN
SCLK
180ns = 2.15µs.
0.1µF
DGND
+5V
V
DD
MAX5541
+2.5V
REF
0.1µF
AGND_
10µF
(REFS)
For optimum system performance, use PC boards with
separate analog and digital ground planes. Wire-wrap
boards are not recommended. Connect the two ground
planes together at the low-impedance power-supply
source. Connect DGND and AGND together at the IC.
The best ground connection can be achieved by con-
necting the DACs DGND and AGND pins together and
connecting that point to the system analog ground
plane. If the DACs DGND is connected to the system
digital ground, digital noise may get through to the
DACs analog portion.
Bypass V
between V
close to the device. Ferrite beads can also be used to
further isolate the analog and digital power supplies.
TRANSISTOR COUNT: 2209
SUBSTRATE CONNECTED TO DGND
Table 1. Unipolar Code Table
DAC LATCH CONTENTS
MSB
1111 1111 1111 1111
1000 0000 0000 0000
0000 0000 0000 0001
0000 0000 0000 0000
DD
DD
with a 0.1µF ceramic capacitor connected
and AGND. Mount it with short leads
OUT
LSB
Power-Supply Bypassing and
V
V
V
0V
MAX495
REF
REF
REF
EXTERNAL OP AMP
ANALOG OUTPUT, V
Chip Information
Ground Management
✕
✕
✕
(32,768 / 65,536) = 1/ 2 V
(65,535 / 65,536)
(1 / 65,536)
UNIPOLAR
OUT
OUT
REF