TC59LM818DMBI-37 Toshiba, TC59LM818DMBI-37 Datasheet - Page 38

• Manufacturer Part Number: TC59LM818DMBI-37
• Manufacturer: Toshiba
• Type: DDR FCRAMr

Specifications of TC59LM818DMBI-37

• Organization: 16Mx18
• Density: 288Mb
• Address Bus: 17b
• Access Time (max): 650ps
• Maximum Clock Rate: 533MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: BGA
• Operating Temp Range: -40C to 100C
• Operating Supply Voltage (max): 2.625V
• Operating Supply Voltage (min): 2.375V
• Supply Current: 420mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

Unidirectional DS/QS mode
Unidirectional DS/Free Running QS mode
Bank Add.
CL = 4
CL = 5
CL = 6
CL = 4
CL = 5
CL = 6
Command
MULTIPLE BANK READ-WRITE TIMING (BL = 4)
Address
(output)
(output)
(output)
(output)
(output)
(output)
(input)
(input)
(input)
(input)
(input)
(input)
CLK
CLK
DQ
DQ
DQ
DQ
DQ
DQ
DS
QS
DS
QS
DS
QS
DS
QS
DS
QS
DS
QS
Note: l
WRA
Bank
UA
"a"
0
I
RBD
RC
Low
Hi-Z
Low
Hi-Z
Low
Hi-Z
Hi-Z
Hi-Z
Hi-Z
I
WRD
to the same bank must be satisfied.
= 2 cycles
LAL
LA
1
= 1 cycle
WL = 3
WL = 4
WL = 5
WL = 3
WL = 4
WL = 5
Bank
RDA
UA
"b"
2
LAL
LA
3
I
RWD
Da0 Da1 Da2 Da3
Da0 Da1 Da2 Da3
4
CL = 4
DESL
= 3 cycles
CL = 5
Da0 Da1 Da2 Da3
Da0 Da1 Da2 Da3
5
CL = 4
I
RC
Bank
WRA
(Bank"a")
CL = 6
Da0 Da1 Da2 Da3
UA
"c"
Da0 Da1 Da2 Da3
6
CL = 5
I
WRD
LAL
LA
7
Qb0 Qb1
CL = 6
Qb0 Qb1
= 1 cycle
RDA
Bank
I
UA
RC
"d"
8
Qb2 Qb3
Qb0 Qb1
Qb2 Qb3
Qb0 Qb1
(Bank"b")
LAL
LA
9
Qb2 Qb3
Qb0 Qb1
Qb2 Qb3
Qb0 Qb1 Qb2 Qb3
I
RWD
10
Dc0 Dc1 Dc2 Dc3
Dc0 Dc1 Dc2 Dc3
Qb2 Qb3
DESL
= 3 cycles
TC59LM818DMBI-37
Dc0 Dc1 Dc2 Dc3
Dc0 Dc1 Dc2 Dc3
11
WRA LAL
Bank
2005-03-07 38/55
Dc0 Dc1 Dc2 Dc3
UA
Dc0 Dc1 Dc2 Dc3
12
"a"
I
WRD
13
LA
Qd0 Qd1 Qd2 Qd3
Qd0 Qd1 Qd2 Qd3
= 1 cycle
Bank
RDA
UA
"b"
14
Rev 1.2
Qd0 Qd1 Qd2
Qd0 Qd1 Qd2
LAL
15
LA
Qd0
Qd0
Qd3
Qd1
Qd3
Qd1