TC59LM818DMBI-37 Toshiba, TC59LM818DMBI-37 Datasheet - Page 20

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TC59LM818DMBI-37

Manufacturer Part Number
TC59LM818DMBI-37
Description
Manufacturer
Toshiba
Type
DDR FCRAMr
Datasheet

Specifications of TC59LM818DMBI-37

Organization
16Mx18
Density
288Mb
Address Bus
17b
Access Time (max)
650ps
Maximum Clock Rate
533MHz
Operating Supply Voltage (typ)
2.5V
Package Type
BGA
Operating Temp Range
-40C to 100C
Operating Supply Voltage (max)
2.625V
Operating Supply Voltage (min)
2.375V
Supply Current
420mA
Pin Count
60
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
MODE REGISTER TABLE
Regular Mode Register (Notes: 1)
Extended Mode Register (Notes: 4)
Notes: 1. Regular Mode Register is chosen using the combination of BA0 = 0 and BA1 = 0.
A6
0
0
1
1
2. “Reserved” places in Regular Mode Register should not be set.
3. A7 in Regular Mode Register must be set to “0” (low state).
4. Extended Mode Register is chosen using the combination of BA0 = 1 and BA1 = 0.
5. A0 in Extended Mode Register must be set to "0" to enable DLL for normal operation.
A5
0
1
0
1
A6
ADDRESS
ADDRESS
0
0
0
1
1
1
1
Register
Register
Because Test Mode is specific mode for supplier.
Unidirectional DS/Free Running QS
A7
A5
0
1
0
1
1
0
0
1
1
Unidirectional DS/QS
STROBE SELECT
A4
TEST MODE (TE)
Reserved
Reserved
×
0
1
0
1
0
1
Regular (default)
Test Mode Entry
CAS LATENCY (CL)
BA1
BA1
0
0
*2
*2
Reserved
Reserved
Reserved
Reserved
*1
*4
4
5
6
BA0
BA0
*2
*2
*2
*2
0
1
*1
*4
A4
A14~A8
A14~A7
0
0
1
1
QS
0
0
A3
0
1
0
1
A2
0
0
1
1
DQ
A2
A6~A5
0
0
0
0
1
A7
SS
TE
A1
0
1
0
1
*3
A3
A1
OUTPUT DRIVE IMPEDANCE CONTROL
0
1
0
0
1
1
×
DIC (QS)
A6~A4
A4~A3
CL
BURST TYPE (BT)
A0
0
1
0
1
×
Normal Output Driver
Strong Output Driver
Weak Output Driver
TC59LM818DMBI-37
Sequential
Interleave
BURST LENGTH (BL)
Reserved
DIC (DQ)
(DIC)
A0
Reserved
Reserved
A2~A1
0
1
2005-03-07 20/55
BT
A3
2
4
DLL SWITCH (DS)
*2
*2
DLL Disable
DLL Enable
A2~A0
A0
DS
BL
Rev 1.2
*5

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