AD6653-150EBZ Analog Devices Inc, AD6653-150EBZ Datasheet - Page 45

• Manufacturer Part Number: AD6653-150EBZ
• Manufacturer: Analog Devices Inc

Specifications of AD6653-150EBZ

• Lead Free Status / Rohs Status: Compliant

MEMORY MAP REGISTER TABLE
All address and bit locations that are not included in Table 25 are not currently supported for this device.
Table 25. Memory Map Registers
Addr.
(Hex)
Chip Configuration Registers
0x00
0x01
0x02
Channel Index and Transfer Registers
0x05
0xFF
ADC Functions Registers
0x08
0x09
0x0B
Register
Name
SPI Port
Configuration
(Global)
Chip ID
(Global)
Chip Grade
(Global)
Channel
Index
Transfer
Power
Modes
Global Clock
(Global)
Clock Divide
(Global)
Open
Open
Open
Bit 7
(MSB)
0
Open
Open
Open
Open
Bit 6
LSB first
Open
Open
Open
Open
Open
Bit 5
Soft reset
Open
Open
External
power-
down pin
function
(global)
0 = pdwn
1 = stndby
Open
Open
Speed Grade ID[4:3]
00 = 150 MSPS
01 = 125 MSPS
Bit 4
1
Open
Open
Open
Open
Open
8-bit Chip ID[7:0]
(AD6653 = 0x0E)
Rev. 0 | Page 45 of 80
(default)
Bit 3
1
Open
Open
Open
Open
Open
Open
Bit 2
Soft reset
Open
Open
Open
Open
Open
Clock divide ratio
000 = divide by 1
001 = divide by 2
010 = divide by 3
011 = divide by 4
100 = divide by 5
101 = divide by 6
110 = divide by 7
111 = divide by 8
Bit 1
LSB first
Open
Data
Channel B
(default)
Open
Internal power-down
mode (local)
00 = normal operation
01 = full power-down
10 = standby
11 = normal operation
Open
Bit 0
(LSB)
0
Open
Data
Channel A
(default)
Transfer
Duty
cycle
stabilize
(default)
Default
Value
(Hex)
0x18
0x0E
0x03
0x00
0x00
0x01
0x00
AD6653
Default
Notes/
Comments
The nibbles
are mirrored
so that
LSB-first or
MSB-first
mode
registers
correctly,
regardless of
shift mode
Default is
unique chip
ID, different
for each
device; this is
a read-only
register
Speed grade
ID used to
differentiate
devices; this
is a read-only
register
Bits are
set to
determine
which device
on chip
receives the
next write
command;
applies to
local
registers
Synchronously
transfers data
from the
master shift
register to
the slave
Determines
various
generic
modes of
chip
operation
Clock divide
values other
than 000
automatically
activate
duty cycle
stabilization