IS42S16100F-7BLI ISSI, Integrated Silicon Solution Inc, IS42S16100F-7BLI Datasheet - Page 12

• Manufacturer Part Number: IS42S16100F-7BLI
• Manufacturer: ISSI, Integrated Silicon Solution Inc

Specifications of IS42S16100F-7BLI

• Lead Free Status / Rohs Status: Compliant

IS42/45S16100F, IS42VS16100F
IS42VS16100F AC CHARACTERISTICS
Symbol Parameter
Notes:
1. The power-on sequence must be executed before starting memory operation.
2. measured with t
3. The reference level is 0.9V when measuring input signal timing. Rise and fall times are measured between V
4. Access time is measured at 0.9V with the load shown in the figure below.
5. The time t
6. Not all parameters are tested at the wafer level, but the parameters have been previously characterized.
12
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
ck
ck
ac
ac
chi
cl
oh
oh
lz
hz
hz
ds
dh
as
ah
cks
ckh
cka
cs
ch
rc
ras
rp
rcd
rrd
dpl
dpl
dal
dal
t
ref
3
2
3
2
3
2
3
2
3
2
3
2
hz
Clock Cycle Time
Access Time From CLK
CLK HIGH Level Width
CLK LOW Level Width
Output Data Hold Time
Output LOW Impedance Time
Output HIGH Impedance Time
Input Data Setup Time
Input Data Hold Time
Address Setup Time
Address Hold Time
CKE Setup Time
CKE Hold Time
CKE to CLK Recovery Delay Time
Command Setup Time (CS, RAS, CAS, WE, DQM)
Command Hold Time (CS, RAS, CAS, WE, DQM)
Command Period (REF to REF / ACT to ACT)
Command Period (ACT to PRE)
Command Period (PRE to ACT)
Active Command To Read / Write Command Delay Time
Command Period (ACT [0] to ACT[1])
Input Data To Precharge
Command Delay time
Input Data To Active / Refresh
Command Delay time (During Auto-Precharge)
Transition Time
Refresh Cycle Time (2048)
(max.) is defined as the time required for the output voltage to become high impedance.
t
= 1.0 ns. If clock rising time is longer than 1ns, (t
(4)
(5)
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
t
(1,2,3,6)
/2 - 0.5)ns should be added to the parameter.
Integrated Silicon Solution, Inc. — www.issi.com
2CLK+t
2CLK+t
1CLK+3 —
2CLK
2CLK
Min. Max.
7.5
2.5
2.5
0.5
10
—
—
—
—
75
45 100,000
20
20
15
—
2
2
0
2
1
2
1
2
1
2
1
-75
rp
rp
1.2
32
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6
8
6
8
ih
(min.) and V
2CLK+t
2CLK+t
1CLK+3
2CLK
2CLK
Min.
100
0.5
10
12
—
—
—
—
60
24
24
20
—
3
3
2
2
0
2
1
2
1
2
1
2
1
-10
rp
rp
il
100,000
(max.).
Max.
1.2
32
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
7
8
7
8
Units
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
06/03/2010
Rev. 00C