MT46V16M16TG-5BLIT Micron Technology Inc, MT46V16M16TG-5BLIT Datasheet - Page 51

• Manufacturer Part Number: MT46V16M16TG-5BLIT
• Manufacturer: Micron Technology Inc

Specifications of MT46V16M16TG-5BLIT

• Lead Free Status / Rohs Status: Not Compliant

READ
Figure 18:
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 256Mb DDR: Rev. O, Core DDR: Rev. B 1/09 EN
READ Command
Note:
The READ command is used to initiate a burst read access to an active row, as shown in
Figure 18 on page 49. The value on the BA0, BA1 inputs selects the bank, and the address
provided on inputs A0–Ai (where Ai is the most significant column address bit for a given
density and configuration, see Table 2 on page 2) selects the starting column location.
BA0, BA1
Address
RAS#
CAS#
WE#
CK#
CKE
CS#
A10
EN AP = enable auto precharge; DIS AP = disable auto precharge.
CK
HIGH
DIS AP
EN AP
Bank
Col
Don’t Care
49
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x4, x8, x16 DDR SDRAM
©2003 Micron Technology, Inc. All rights reserved.
Commands