ADV7330KST Analog Devices Inc, ADV7330KST Datasheet - Page 12

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ADV7330KST

Manufacturer Part Number
ADV7330KST
Description
Manufacturer
Analog Devices Inc
Datasheet

Specifications of ADV7330KST

Operating Supply Voltage (typ)
2.5V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Package Type
LQFP
Mounting
Surface Mount
Pin Count
64
Lead Free Status / Rohs Status
Compliant

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ADV7330
Pin Number
11, 57
2, 3, 14, 15,
51–55, 58–63
40
32
36
39
38
37
25
23
24
4–9, 12, 13
16–18, 26–30
33
35
22
21
20
1
Mnemonic
DGND
TEST0–TEST14
AGND
CLKIN
COMP
DAC A
DAC B
DAC C
BLANK_I/P
HSYNC_I/P
VSYNC_I/P
Y7–Y0
C7–C0
RESET
R
SCLK
SDA
ALSB
V
DD_IO
SET
V
TEST0
TEST1
TEST2
TEST3
DGND
DD_IO
V
G
I
G
I
O
O
O
O
I
I
I
I
I
I
I
I
I/O
I
P
I/O
NC = NO CONNECT
C0
Y0
Y1
Y2
Y3
Y4
Y5
DD
Y6
Y7
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
Function
Digital Ground.
Not used, tie to DGND.
Analog Ground.
Pixel Clock Input for HD (74.25 MHz Only, PS (27 MHz), SD (27 MHz)).
Compensation Pin for DACs. Connect 0.1 µF capacitor from COMP pin to V
CVBS/GREEN/Y Analog Output.
Chroma/BLUE/Pb Analog Output.
Luma/RED/Pr Analog Output.
Video Blanking Control Signal. For HD and PS, this input is active high. For SD
input, this input is active low.
Video Horizontal Sync Control Signal.
Video Vertical Sync Control Signal.
SD or Progressive Scan/HDTV Input Port for Y Data. Input port for interleaved
progressive scan data. The LSB is set up on Pin Y0.
8-Bit SD/Progressive Scan/HDTV Input Port. The LSB is set up on Pin C0.
This input resets the on-chip timing generator and sets the ADV7330 into the default
register setting. Reset is an active low signal.
A 3040 Ω resistor must be connected from this pin to AGND and is used to control
the amplitudes of the DAC outputs.
I
I
TTL Address Input. This signal sets up the LSB of the I
tied low, the I
Power Supply for Digital Inputs and Outputs.
64
17
PIN 1
IDENTIFIER
2
2
PIN FUNCTION DESCRIPTIONS
C Port Serial Interface Clock Input.
C Port Serial Data Input/Output.
63
18
62
19
PIN CONFIGURATION
61
20
60
21
59
22
(Not to Scale)
ADV7330
2
58
TOP VIEW
23
C filter is activated, which reduces noise on the I
–12–
57
24
56
25
55
26
54
27
53
28
52
29
51
30
50
31
49
32
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
BLANK_O/P
TEST16
V
TEST15
NC
NC
NC
V
AGND
DAC A
DAC B
DAC C
COMP
R
EXT_LF
RESET
REF
AA
SET
2
C address. When this pin is
2
C interface.
AA
.
REV. B

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