AD664BD-BIP Analog Devices Inc, AD664BD-BIP Datasheet - Page 14
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AD664BD-BIP
Manufacturer Part Number
AD664BD-BIP
Description
IC DAC 12BIT QUAD MONO 28-CDIP
Manufacturer
Analog Devices Inc
Datasheet
1.AD664JNZ-BIP.pdf
(20 pages)
Specifications of AD664BD-BIP
Data Interface
Parallel
Rohs Status
RoHS non-compliant
Settling Time
8µs
Number Of Bits
12
Number Of Converters
4
Voltage Supply Source
Dual ±
Power Dissipation (max)
525mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
28-CDIP (0.600", 15.24mm)
Resolution (bits)
12bit
Sampling Rate
125kSPS
Supply Voltage Range - Digital
4.5V To 5.5V
Supply Current
15mA
Digital Ic Case Style
DIP
No. Of Pins
28
Number Of Channels
4
Resolution
12b
Conversion Rate
125KSPS
Interface Type
Parallel
Single Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (typ)
±15V
Architecture
R-2R
Power Supply Requirement
Dual
Output Type
Voltage
Integral Nonlinearity Error
±0.75LSB
Single Supply Voltage (min)
Not RequiredV
Single Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
±11.4V
Dual Supply Voltage (max)
±16.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
CDIP
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD664BD-BIP
Manufacturer:
ADI
Quantity:
558
Part Number:
AD664BD-BIP
Manufacturer:
ADI/亚德诺
Quantity:
20 000
AD664
The schemes in Figure 25 illustrate some of the trade-offs which
a designer may make when configuring a system. For example,
the designer may use I/O lines instead of address bits or vice
versa. This decision may be influenced by other I/O tasks or sys-
tem expansion requirements. He/she can also choose to imple-
ment only a subset of the features available. Perhaps the RST
pin isn’t really needed. Tying that input pin to V
another I/O or address bit. The same consideration applies to
mode select. In all of these cases TR is shown tied to V
because the MC6801 cannot provide the 12-bit-wide input
word required for the transparent mode. In situations where
transparent operation isn’t required, and mode select is also not
needed, the designer may consider specifying the DIP version of
the device (either the UNI or BIP version).
Figure 25d. Interfacing Eight AD664s to an MC6801
LOGIC
frees up
LOGIC
,
–14–
Each of the schemes illustrated in Figure 25 operates with an
MC6801 at clock rates up to and including 1.5 MHz. Similar
schemes can be derived for other 8-bit microprocessors and
microcontrollers such as the 8051/8086/8088/6502, etc. One
such scheme developed for the 8051/AD664 is illustrated in
Figure 26.
8051 Interface
Figure 26 shows the AD664 combined with an 8051 controller
chip. Three LSBs of address provide the quad and DAC select
signals. Control signals from Port 1 select various operating
modes such as readback, mode select and reset as well as pro-
viding the LS signal. Read and write signals from the 8051 are
decoded to provide the CS signal.
REV. C