AD669BR-REEL Analog Devices Inc, AD669BR-REEL Datasheet
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AD669BR-REEL
Specifications of AD669BR-REEL
Related parts for AD669BR-REEL
AD669BR-REEL Summary of contents
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FEATURES Complete 16-Bit D/A Function On-Chip Output Amplifier High Stability Buried Zener Reference Monolithic BiMOS II Construction 1 LSB Integral Linearity Error 15-Bit Monotonic over Temperature Microprocessor Compatible 16-Bit Parallel Input Double-Buffered Latches Fast 40 ns Write Pulse Unipolar ...
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AD669–SPECIFICATIONS Model RESOLUTION DIGITAL INPUTS ( MIN MAX V (Logic “1” (Logic “0” 5 TRANSFER FUNCTION CHARACTERISTICS Integral Nonlinearity ...
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AC PERFORMANCE CHARACTERISTICS Ratio, these characteristics are included for design guidance only and are not subject to test. THD+N and SNR are 100% tested + – MIN A MAX ...
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... Temperature Model Range AD669AN – +85 C AD669AR – +85 C AD669BN – +85 C AD669BR – +85 C AD669AQ – +85 C AD669BQ – +85 C AD669SQ – +125 C AD669/883B** – +125 Plastic DIP Cerdip SOIC. ...
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DEFINITIONS OF SPECIFICATIONS INTEGRAL NONLINEARITY: Analog Devices defines inte- gral nonlinearity as the maximum deviation of the actual, ad- justed DAC output from the ideal analog output (a straight line drawn from 0 to FS–1 LSB) for any bit combination. ...
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AD669 desired to adjust the gain and offset errors to zero, this can be accomplished using the circuit shown in Figure 3b. The adjustment procedure is as follows: STEP1 . . . ZERO ADJUST Turn all bits ...
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V, 8.192 V and 10.24 V ranges to be used. For ex- ample, by using the AD586 5 V reference, outputs unipolar bipolar can be realized. Using the AD586 ...
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AD669 OUTPUT SETTLING AND GLITCH The AD669’s output buffer amplifier typically settles to within 0.0008% FS (l/2 LSB) of its final value for a full-scale step. Figures 7a and 7b show settling for a full-scale and an ...
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Unipolar coding is straight binary, where all zeros (0000H) on the data inputs yields a zero analog output and all ones (FFFFH) yields an analog output 1 LSB below full scale. Bipolar coding is offset binary, where an input code ...
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AD669 tied together which configures the input stage as an edge trig- gered 16-bit register. The rising edge of the decoded signal latches the data and updates the output of the DAC neces- sary to insert wait states ...
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NOISE In high resolution systems, noise is often the limiting factor. A 16-bit DAC with a 10 volt span has an LSB size of 153 V (–96 dB). Therefore, the noise floor must remain below this level in the frequency ...
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AD669 –12– REV. A ...