AD669 Analog Devices, AD669 Datasheet
AD669
Specifications of AD669
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AD669 Summary of contents
Page 1
... The on-chip output amplifier provides a voltage output settling time within 1/2 LSB for a full-scale step. Data is loaded into the AD669 in a parallel 16-bit format. The double-buffered latch structure eliminates data skew errors and provides for simultaneous updating of DACs in a multi-DAC system ...
Page 2
... LSB = 0.006% of FSR = 60 ppm of FSR. FSR stands for Full-Scale Range and for span and 20 V for a – +10 V span. 2 Gain error and gain drift measured using the internal reference. Gain drift is primarily reference related. See the Using the AD669 with the AD688 Reference section for further information. ...
Page 3
... LDAC 40 ns min 15 ns min 120 ns min 45 ns min Figure 1a. AD669 Level Triggered Timing Diagram 165 ns min 45 ns min CS AND/OR 150 ns min L1, LDAC 15 ns min TIE CS AND/ GROUND OR TOGETHER WITH LDAC Figure 1b. AD669 Edge Triggered Timing Diagram – ...
Page 4
... The AD669 features input protection circuitry consisting of large transistors and polysilicon series resistors to dissipate both high-energy discharges (Human Body Model) and fast, low-energy pulses (Charged Device Model). Per Method 3015.2 of MIL-STD-883: C, the AD669 has been classified as a Class 2 device. Proper ESD precautions are strongly recommended to avoid functional damage or performance degradation ...
Page 5
... This noise is digital feedthrough. OUT REV. A THEORY OF OPERATION The AD669 uses an array of bipolar current sources with MOS current steering switches to develop a current proportional to the applied digital word, ranging from mA. A seg- mented architecture is used, where the most significant four data bits are thermometer decoded to drive 15 equal current sources ...
Page 6
... If an external reference is used (10.000 V, for example), addi- tional trim range should be provided, since the internal refer- ence has a tolerance of 20 mV, and the AD669 gain and bipolar offset are both trimmed with the internal reference. The optional gain and offset trim resistors in Figures 5 and 6 provide enough adjustment range to null these errors ...
Page 7
... Figure 6. Using the AD669 with the AD688 High Precision 10 V Reference REV. A USING THE AD669 WITH THE AD688 HIGH PRECISION VOLTAGE REFERENCE The AD669 is specified for gain drift from 15 ppm ppm/ C (depending upon grade) using its internal 10 volt reference ...
Page 8
... Pins 5 and 6 low and Pin 23 high. Table I shows the truth table for 4 5 the AD669, while the timing diagram is found in Figure 1. INPUT CODING The AD669 uses positive-true binary input coding. Logic “1” is represented by an input voltage greater than 2.0 V, and Logic “ ...
Page 9
... DSP crystal performance is not important not necessary for IRQA to specification synchronous. After the interrupt is acknowledged, the interrupt routine ini- tiates a memory write cycle. All of the AD669 control inputs are –9– AD669 A0 ADDRESS BUS A13 ...
Page 10
... AD669 to become transparent. Simultaneously, the 8086 places data on the multiplexed bus which is then latched into the first rank of the AD669 with the rising edge of the WR pulse. Care should be taken to prevent excessive delays through the decoder potentially resulting in a ...
Page 11
... Any exter- nal loads on the output of the AD669 should be returned to analog ground external reference is used, this should also be returned to the analog ground single AD669 is used with separate analog and digital ...
Page 12
... AD669 –12– REV. A ...