S2065A Applied Micro Circuits Corporation, S2065A Datasheet - Page 17

• Manufacturer Part Number: S2065A
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S2065A

• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3.13V
• Operating Supply Voltage (max): 3.47V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Lead Free Status / Rohs Status: Not Compliant

October 13, 2000 / Revision G
OTHER OPERATING MODES
Operating Frequency Range
The S2065 is designed to operate at serial baud
rates of 770 MHz to 1.3 GHz (616 Mbit/sec to 1000
Mbit/sec user data rate). The part is specified at the
Fibre Channel rate (1062 MHz) and the Gigabit
Ethernet rate (1.25 GHz), but will operate satisfacto-
rily at any rate in this range.
Loopback Mode
When loopback mode is enabled, the serial data
from the transmitter is provided to the serial input of
the receiver. Loopback mode can be simultaneously
enabled for all four channels using the loopback-en-
able input, LPEN.
Figure 10. S2065 Diagnostic Loopback
QUAD SERIAL BACKPLANE DEVICE WITH DUAL I/O
CSU
CRU
Disabled
Output
The loopback mode provides the ability to perform
system diagnostics and off-line testing of the inter-
face to guarantee the integrity of the serial channel
before enabling the transmission medium. Loopback
is enabled when LPEN = 1.
The high speed serial outputs are disabled when
loopback operation is enabled.
Test Modes
The S2065 has a testability input to aid in functional
testing of the device. The test mode is entered when
CH_LOCK is HIGH and TCLKB is HIGH. Thus users
must take care to ensure that TCLK[B-D] are held
LOW when operating in the channel locked mode.
The following conditions are asserted when in test
mode:
1. REFCLK replaces the VCO CLK (it also still goes
2. TCLKA clocks all 4 transmit channels.
3. TCLKC is muxed in as the lock detect REFCLK for
4. TCLKD becomes the channel lock signal to the
The RESET pin is used to initialize the Transmit
FIFOs and must be asserted (LOW) prior to entering
the normal operational state (see section Transmit
FIFO Initialization). Note that Reset does not disable
the TCLKO output unless the TCLKB input is HIGH.
to the transmit clock mux).
test purposes.
whole of the chip except the transmit clock.
S2065
17