SC1200UCL-266 AMD (ADVANCED MICRO DEVICES), SC1200UCL-266 Datasheet - Page 319

• Manufacturer Part Number: SC1200UCL-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UCL-266

• Lead Free Status / Rohs Status: Not Compliant

F4BAR2+Memory Offset 24h
F4BAR2+Memory Offset 20h
Video Processor Module
7.2.1.4
There are three types of VBI data defined by the CCIR-656
protocol: Task A data, Task B data, and Ancillary data. The
VIP block supports the capture for each data type. Gener-
ally Task A data is the data type captured. Just as in Cap-
ture Video mode, there are three registers that tell the bus
master where to put the raw VBI data in the GX1 module’s
frame buffer. Once the raw VBI data has been captured,
the data can be manipulated or decoded. The VIP block
has two options of what to do with the altered VBI data.
These options are independent functions so both options
can be done simultaneously.
1)
AMD Geode™ SC1200/SC1201 Processor Data Book
Video Data Even Base
Video Data Odd Base
Capture video fill sequence
Controller empty sequence
The data can be used by an application. An example
of this would be an Internet address that is encoded on
one or more of the VBI lines, or have an application
decode the Closed Captioning information put in the
graphics frame buffer.
GX1 Module’s Display
85 frames per second
Capture VBI Mode
Figure 7-6. Capture Video Mode Weave Example Using Two Video Frame Buffers
30 frames per second
Ping-pongs between the two buffers during runtime
Video Frame Buffer #1
Line 1 Odd Field
Line n Odd Field
Line n-1 Odd Field
Line n-1 Even Field
Line 2 Odd Field
Buf #1
Line 1 Even Field
Line 2 Even Field
Line n Even Field
1
2
Buf #2
1 2 3 4
3
4
5
5
5
5
GX_BASE+Memory Offset 8320h
F4BAR2+Memory Offset 20h
F4BAR2+Memory Offset 24h
6
GX1 Module’s Video Frame Buffer
6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
two buffers during runtime
Video Data Even Base
Video Data Even Base
Ping-pongs between the
Odd and Even fields are
VID_START_OFFSET
2)
The registers, F4BAR2+Memory Offset 40h, 44h, and 48h,
tell the bus master the destination addresses for the VBI
data in the GX1 module’s frame buffer. Five bits
(F4BAR2+Memory Offset 00h[21:17]) are used to tell the
bus master the data types to store. Capture VBI mode
needs
04h[9,1:0]. The Field Interrupt bit (F4BAR2+Memory Offset
04h[16]) should be used by the software driver to know
when the captured VBI data has been completed for a field.
7
7
“Weaved” together
The altered VBI data can be sent to the TVOUT block
of the Video Processor via the video frame buffer or
graphics frame buffer. See VIP block diagram (Figure
7-4 on page 315). The Closed Captioning data could
be altered and then sent out this way. One reason to
capture the Closed Captioning data would be to do a
language conversion. If the VIP block is in Capture
Video mode then this option is not possible because
the video frame buffer can be used for sending video
or VBI, but not simultaneously.
8
to
9
be
10
enabled
11
11
12
13
32579B
at
Video Frame Buffer #2
14
F4BAR2+Memory Offset
Line n-1 Odd Field
Line n-1 Even Field
Line 1 Odd Field
Line 2 Odd Field
Line n Odd Field
Line 1 Even Field
Line 2 Even Field
Line n Even Field
15
15
16
21
17
22
18
18
23
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