SC1200UCL-266 AMD (ADVANCED MICRO DEVICES), SC1200UCL-266 Datasheet - Page 257

• Manufacturer Part Number: SC1200UCL-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UCL-266

• Lead Free Status / Rohs Status: Not Compliant

Core Logic Module - IDE Controller Registers - Function 2
AMD Geode™ SC1200/SC1201 Processor Data Book
Index 30h-3Fh
Index 40h-43h
If Index 44h[31] = 0, Format 0. Bits [15:0] configure the same timing control for both command and data.
Format 0 settings for a Fast-PCI clock frequency of 33.3 MHz:
Format 0 settings for a Fast-PCI clock frequency of 66.7 MHz:
Note:
If Index 44h[31] = 1, Format 1. Bits [31:0] allow independent timing control of command and data.
Format 1 settings for a Fast-PCI clock frequency of 33.3 MHz:
Format 1 settings for a Fast-PCI clock frequency of 66.7 MHz:
Note:
Table 6-35. F2: PCI Header/Channels 0 and 1 Registers for IDE Controller Configuration (Continued)
31:20
19:16
15:12
31:28
27:24
23:20
19:16
15:12
11:8
11:8
— PIO Mode 0 = 00009172h
— PIO Mode 1 = 00012171h
— PIO Mode 2 = 00020080h
— PIO Mode 3 = 00032010h
— PIO Mode 4 = 00040010h
— PIO Mode 0 = 0000F8E4h
— PIO Mode 1 = 000153F3h
— PIO Mode 2 = 000213F1h
— PIO Mode 3 = 00034231h
— PIO Mode 4 = 00041131h
— PIO Mode 0 = 9172D132h
— PIO Mode 1 = 21717121h
— PIO Mode 2 = 00803020h
— PIO Mode 3 = 20102010h
— PIO Mode 4 = 00100010h
— PIO Mode 0 = F8E4F8E4h
— PIO Mode 1 = 53F3F353h
— PIO Mode 2 = 13F18141h
— PIO Mode 3 = 42314231h
— PIO Mode 4 = 11311131h
Bit
7:4
3:0
7:4
3:0
All references to “cycle” in the following bit descriptions are to a Fast-PCI clock cycle.
All references to “cycle” in the following bit descriptions are to a Fast-PCI clock cycle.
Description
Reserved. Must be set to 0.
PIOMODE. PIO mode.
t2I. Recovery time (value + 1 cycle).
t3. IDE_IOW# data setup time (value + 1 cycle).
t2W. IDE_IOW# width minus t3 (value + 1 cycle).
t1. Address Setup Time (value + 1 cycle).
t2IC. Command cycle recovery time (value + 1 cycle).
t3C. Command cycle IDE_IOW# data setup (value + 1 cycle).
t2WC. Command cycle IDE_IOW# pulse width minus t3 (value + 1 cycle).
t1C. Command cycle address setup time (value + 1 cycle).
t2ID. Data cycle recovery time (value + 1 cycle).
t3D. Data cycle IDE_IOW# data setup (value + 1 cycle).
t2WD. Data cycle IDE_IOW# pulse width minus t3 (value + 1 cycle).
t1D. Data cycle address Setup Time (value + 1 cycle).
Channel 0 Drive 0 PIO Register (R/W)
Reserved
32579B
Reset Value: 00009172h
Reset Value: 00h
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