AD5763CSUZ-REEL7 Analog Devices Inc, AD5763CSUZ-REEL7 Datasheet
AD5763CSUZ-REEL7
Specifications of AD5763CSUZ-REEL7
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AD5763CSUZ-REEL7 Summary of contents
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FEATURES Complete dual, 16-bit DAC Programmable output range ±4.096 V, ±4.201 V, or ±4.311 V ±1 LSB maximum INL error, ±1 LSB maximum DNL error Low noise: 70 nV/√Hz Settling time: 10 μs maximum Integrated reference buffers On-chip die temperature ...
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AD5763 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Functional Block Diagram .............................................................. 3 Specifications ..................................................................................... 4 AC Performance Characteristics ................................................ 5 Timing Characteristics ................................................................ 6 Absolute Maximum Ratings ............................................................ 9 ...
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FUNCTIONAL BLOCK DIAGRAM AV PGND AD5763 DGND 16 SDIN INPUT SHIFT SCLK REGISTER AND SYNC CONTROL LOGIC SDO D0 D1 BIN/2sCOMP REFGND REFA REFERENCE BUFFERS 16 INPUT DAC DAC A REG ...
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AD5763 SPECIFICATIONS −5. −4.75 V, AGNDx = DGND = REFGND = PGND = 0 V, REFA = REFB = 2.048 2 5.25 ...
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Parameter DIE TEMPERATURE SENSOR Output Voltage at 25°C Output Voltage Scale Factor Output Voltage Range Output Load Current Power-On Time POWER REQUIREMENTS AV / Power Supply Sensitivity ∆V /∆ΑV ...
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AD5763 TIMING CHARACTERISTICS −5. −4.75 V, AGNDx = DGND = REFGND = PGND = 0 V, REFA = REFB = 2.048 2 ...
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SCLK SYNC t 7 SDIN DB23 LDAC VOUTx LDAC = 0 VOUTx t 13 CLR t 14 VOUTx SCLK SYNC DB23 SDIN INPUT WORD ...
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AD5763 SCLK SYNC DB23 SDIN SDO 24 DB0 DB23 INPUT WORD SPECIFIES REGISTER TO BE READ DB23 UNDEFINED Figure 4. Readback Timing Diagram 200µ OUTPUT PIN C L 50pF 200µ Figure 5. Load Circuit for ...
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ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 5. Parameter AV to AGNDx, DGND AGNDx, DGND DGND CC DV ...
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AD5763 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions Pin No. Mnemonic 1 SYNC 2 SCLK 3 SDIN 4 SDO 5 1 CLR 6 LDAC RSTOUT 10 RSTIN 11 DGND ...
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Pin No. Mnemonic 22 VOUTA 25 REFA 26 REFB 28 REFGND 29 TEMP 32 BIN/2sCOMP 1 Internal pull-up device on this logic input. Therefore, it can be left floating and defaults to a logic high condition. Description Analog Output Voltage ...
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AD5763 TYPICAL PERFORMANCE CHARACTERISTICS 1.0 0 25°C A 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 10,000 20,000 30,000 40,000 CODE Figure 7. Integral Nonlinearity Error vs. Code 1 25°C 0.8 A 0.6 0.4 ...
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TEMPERATURE (°C) Figure 13. Bipolar Zero Error vs. Temperature –0.008 –0.009 –0.010 –0.011 –0.012 –0.013 –0.014 –0.015 –0.016 –40 – TEMPERATURE (°C) ...
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AD5763 1 CH1 1.25V M1.00µs Figure 19. Negative Full-Scale Step 25° –10 –20 –30 –40 –1.0 –0.5 0 0.5 1.0 1.5 TIME (µs) Figure 20. Major Code Transition Glitch Energy 4 CH4 ...
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TERMINOLOGY Relative Accuracy or Integral Nonlinearity (INL) For the DAC, relative accuracy or INL is a measure of the maximum deviation, in LSBs, from a straight line passing through the endpoints of the DAC transfer function. A typical INL vs. ...
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AD5763 THEORY OF OPERATION The AD5763 is a dual, 16-bit, serial input, bipolar voltage output DAC and operates from supply voltages of ±4. ±5.25 V. The part has a specified buffered output voltage ±4.311 V. ...
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MOSI SDIN SCK SCLK PC7 SYNC PC6 LDAC MISO SCLK SYNC LDAC SCLK SYNC LDAC 1 ADDITIONAL PINS OMITTED FOR CLARITY. Figure 26. Daisy-Chaining the AD5763 Daisy-Chain Operation For systems that contain several devices, the SDO pin can ...
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AD5763 TRANSFER FUNCTION Table 7 shows the ideal input code to output voltage relationship for the AD5763 for both offset binary and twos complement data coding. Table 7. Ideal Output Voltage to Input Code Relationship Digital Input Analog Output Offset ...
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FUNCTION REGISTER The function register is addressed by setting the three REG bits to 000. The values written to the address bits and the data bits determine the function addressed. The functions available via the function register are outlined in ...
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AD5763 FINE GAIN REGISTER The fine gain register is addressed by setting the three REG bits to 100. The DAC address bits select with which DAC channel the data transfer is to take place (see Table 9). The fine gain ...
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WORKED EXAMPLE OF OFFSET AND GAIN ADJUSTMENT Using the information provided in the previous section, the following worked example demonstrates how the functions of the AD5763 can be used to eliminate both offset and gain errors. Because the AD5763 is ...
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AD5763 DESIGN FEATURES ANALOG OUTPUT CONTROL In many industrial process control applications vital that the output voltage be controlled during power-up and during brownout conditions. When the supply voltages change, the output pins are clamped ...
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LOCAL GROUND OFFSET ADJUST The AD5763 incorporates a local-ground-offset adjust feature which, when enabled in the function register, adjusts the DAC outputs for voltage differences between the individual DAC ground pins and the REFGND pin ensuring that the DAC output ...
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AD5763 APPLICATIONS INFORMATION BIN/2sCOMP SYNC SCLK LDAC RSTOUT RSTIN TYPICAL OPERATING CIRCUIT Figure 29 shows the typical operating circuit for the AD5763. The only external components needed for this precision 16-bit DAC are a reference voltage source, decoupling capacitors on ...
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Initial accuracy error on the output voltage of an external refer- ence could lead to a full-scale error in the DAC. Therefore, to minimize these errors, a reference with a low initial accuracy error specification is preferred. Choosing a reference ...
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AD5763 LAYOUT GUIDELINES In any circuit where accuracy is important, careful consideration of the power supply and ground return layout helps to ensure the rated performance. The printed circuit board (PCB) on which the AD5763 is mounted should be designed ...
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... OUTLINE DIMENSIONS 1.05 1.00 0.95 0.15 0.05 VIEW A ROTATED 90° CCW ORDERING GUIDE Model INL 1 AD5763CSUZ ± 2 LSB AD5763CSUZ-REEL7 1 ± 1 LSB RoHS Compliant Part. 1.20 0.75 MAX 0.60 0. 0° MIN 0.20 0.09 7° 8 3.5° 0° 9 SEATING 0.08 MAX PLANE ...
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AD5763 NOTES ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07250-0-10/09(A) Rev Page ...