MAX5888AEGK+D Maxim Integrated Products, MAX5888AEGK+D Datasheet - Page 7

IC DAC 16BIT 3.3V 500MSPS 68-QFN

MAX5888AEGK+D

Manufacturer Part Number
MAX5888AEGK+D
Description
IC DAC 16BIT 3.3V 500MSPS 68-QFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5888AEGK+D

Settling Time
11ns
Number Of Bits
16
Data Interface
Parallel
Number Of Converters
1
Voltage Supply Source
Analog and Digital
Power Dissipation (max)
130mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
68-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9, 41, 60, 62
Performance DAC with Differential LVDS Inputs
18, 24, 29,
19, 25, 28,
10, 40, 61
31, 33, EP
23, 34–38
11, 16
12, 15
30, 32
PIN
13
14
17
20
21
22
26
27
39
42
43
44
1
2
3
4
5
6
7
8
CLKGND
DACREF
FSADJ
IOUTN
NAME
DGND
AGND
REFIO
IOUTP
CLKN
DV
VCLK
CLKP
AV
B15N
SEL0
B15P
B14P
B3N
B2N
B1N
B0N
N.C.
B3P
B2P
B1P
B0P
PD
_______________________________________________________________________________________
DD
DD
Data Bit 3
Complementary Data Bit 3
Data Bit 2
Complementary Data Bit 2
Data Bit 1
Complementary Data Bit 1
Data Bit 0 (LSB)
Complementary Data Bit 0 (LSB)
Digital Ground
Digital Supply Voltage. Accepts a supply voltage range of 3.135V to 3.465V. Bypass each pin with a
0.1µF capacitor to the nearest DGND.
Clock Supply Voltage. Accepts a supply voltage range of 3.135V to 3.465V. Bypass each pin with a
0.1µF capacitor to the nearest CLKGND.
Clock Ground
Converter Clock Input. Positive input terminal for the differential converter clock.
Complementary Converter Clock Input. Negative input terminal for the differential converter clock.
Power-Down Input. PD pulled high enables the DAC’s power-down mode. PD pulled low allows for
normal operation of the DAC. This pin features an internal pulldown resistor.
Analog Supply Voltage. Accepts a supply voltage range of 3.135V to 3.465V. Bypass each pin with a
0.1µF capacitor to the nearest AGND.
Analog Ground. Exposed paddle (EP) must be connected to AGND.
Reference I/O. Output of the internal 1.2V precision bandgap reference. Bypass with a 1µF capacitor
to AGND. Can be driven with an external reference source.
Full-Scale Adjust Input. This input sets the full-scale output current of the DAC. For 20mA full-scale
output current, connect a 2kΩ resistor between FSADJ and DACREF.
Return Path for the Current Set Resistor. For 20mA full-scale output current, connect a 2kΩ resistor
between FSADJ and DACREF.
Not Connected. Do not connect to these pins. Do not tie these pins together.
Complementary DAC Output. Negative terminal for differential current output. The full-scale output
current range can be set from 2mA to 20mA.
DAC Output. Positive terminal for differential current output. The full-scale output current range can
be set from 2mA to 20mA.
Mode Select Input SEL0. Set high to activate the segment shuffling function. Since this pin features an
internal pulldown resistor, it can be left open or pulled low to disable the segment-shuffling function.
See Segment Shuffling in the Detailed Description section for more information.
Data Bit 15 (MSB)
Complementary Data Bit 15 (MSB)
Data Bit 14
3.3V, 16-Bit, 500Msps High Dynamic
FUNCTION
Pin Description
7

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