CAT5419WI-50-T1 ON Semiconductor, CAT5419WI-50-T1 Datasheet - Page 5

• Manufacturer Part Number: CAT5419WI-50-T1
• Description: IC POT DPP 50K 64TAP 24SOIC
• Manufacturer: ON Semiconductor

Specifications of CAT5419WI-50-T1

• Taps: 64
• Resistance (ohms): 50K
• Number Of Circuits: 2
• Temperature Coefficient: 300 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (7.5mm Width)
• Resistance In Ohms: 50K
• Number Of Elements: 2
• # Of Taps: 64
• Resistance (max): 50KOhm
• Power Supply Requirement: Single
• Interface Type: Serial (2-Wire/I2C)
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): Not RequiredV
• Single Supply Voltage (min): 2.5V
• Single Supply Voltage (max): 6V
• Dual Supply Voltage (min): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WRITE CYCLES LIMITS
The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write
cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.
RELIABILITY CHARACTERISTICS
Over recommended operating conditions unless otherwise stated.
Note:
(1)
(2) t
Figure 1. Bus Timing
Figure 2. Write Cycle Timing
Figure 3. Start/Stop Timing
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Characteristics subject to change without notice
Symbol
Symbol
I
N
V
LTH
T
This parameter is tested initially and after a design or process change that affects the parameter.
t
END
ZAP
PUR
DR
WR
(1)(2)
SDA OUT
(1)
(1)
(1)
and t
SDA IN
SCL
SDA
SCL
PUW
Parameter
Write Cycle Time
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-Up
are the delays required from the time V
t SU:STA
SDA
SCL
t F
8TH BIT
BYTE n
START BIT
t HD:STA
MIL-STD-883, Test Method 1033
Reference Test Method
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
t LOW
ACK
t AA
t HD:DAT
CC
t HIGH
is stable until the specified operation can be initiated.
STOP
CONDITION
t LOW
5
t DH
t SU:DAT
t R
t WR
1,000,000
2000
Min
100
100
STOP BIT
START
CONDITION
Typ
t SU:STO
t BUF
Max
ADDRESS
Doc. No. MD-2115 Rev. J
Max
Cycles/Byte
5
CAT5419
Years
Units
Volts
mA
Units
ms