DS1859B-020 Maxim Integrated Products, DS1859B-020 Datasheet
DS1859B-020
Specifications of DS1859B-020
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DS1859B-020 Summary of contents
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... Serial Interface ♦ Two Buffers with TTL/CMOS-Compatible Inputs and Open-Drain Outputs ♦ Operates from a 3. Supply ♦ Operating Temperature Range of -40°C to +95°C PART DS1859B-020 DS1859B-020+ DS1859B-050 DS1859B-050+ +Denotes lead-free package. Ordering Information continued at end of data sheet 3.3V ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors ABSOLUTE MAXIMUM RATINGS Voltage Range on V Relative to Ground ...........-0.5V to +6.0V CC Voltage Range on Inputs Relative to Ground* ................................................-0. Voltage Range on Resistor Inputs Relative to Ground* ................................................-0.5V ...
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Dual, Temperature-Controlled Resistors with ANALOG RESISTOR CHARACTERISTICS (V = 2.85V to 5.5V -40°C to +95°C, unless otherwise noted PARAMETER SYMBOL Position 00h Resistance (50k ) Position FFh Resistance (50k ) Position 00h Resistance (20k ) Position ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors AC ELECTRICAL CHARACTERISTICS (V = 2.85V to 5.5V -40°C to +95°C, unless otherwise noted. See Figure 6 PARAMETER SYMBOL SCL Clock Frequency Bus Free Time Between STOP and START ...
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Dual, Temperature-Controlled Resistors with Note 10: After this period, the first clock pulse is generated. Note 11: The maximum t only has to be met if the device does not stretch the LOW period (t HD:DAT Note 12: A device ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors (V = 5.0V +25°C, for both 50k and 20k versions, unless otherwise noted RESISTOR 0 DNL (LSB) 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 ...
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Dual, Temperature-Controlled Resistors with (V = 5.0V +25°C, for both 50k and 20k versions, unless otherwise noted POSITION 00h RESISTANCE vs. TEMPERATURE 0.38 20k VERSION 0.37 0.36 0.35 0.34 0.33 -40 -25 - ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors PIN BALL NAME 1 B2 SDA 2-Wire Serial Data I/O Pin. Transfers serial data to and from the device SCL 2-Wire Serial Clock Input. Clocks data into and out of the ...
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Dual, Temperature-Controlled Resistors with AD (AUXILIARY DEVICE ENABLE A0h) DEVICE MD (MAIN DEVICE ENABLE) ADDRESS DEVICE ADDRESS ADEN ADFIX SDA ADDRESS 2-WIRE INTERFACE DATA BUS SCL R/W TxF Tx FAULT OUT1 MINT IN1 INV1 RxL LOS OUT2 INV2 IN2 INTERNAL ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors Table 1. Scales for Monitor Channels at Factory Setting +FS +FS SIGNAL SIGNAL (hex) Temperature 127.984 C 7FFC V 6.5528V FFF8 CC MON1 2.4997V FFF8 MON2 2.4997V FFF8 MON3 2.4997V FFF8 Table 2. ...
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Dual, Temperature-Controlled Resistors with Table 4. ADEN Address Configuration ADEN NO. OF SEPARATE (ADDRESS DEVICE ENABLE) ADDRESSES (Main Device only) MAIN DEVICE ENABLE AUXILIARY DEVICE ENABLE DEC 127 128 143 199 Figure 2. ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors MAIN DEVICE ENABLE DEC 127 128 143 199 255 Figure 3. Memory Organization, ADEN = 1 above is accessible only through the Main Device address. This memory is organized as ...
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Dual, Temperature-Controlled Resistors with A description of the registers is below. The registers are read only (R) or read/write (R/W). The R/W registers are writable only if write protect has not been asserted (see the Memory Description section). Auxiliary Device ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors Main Device (continued) MEMORY EEPROM/ LOCATION R/W SRAM (hex EEPROM R EEPROM R EEPROM R EEPROM R EEPROM ...
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Dual, Temperature-Controlled Resistors with Main Device (continued) MEMORY EEPROM/ LOCATION R/W SRAM (hex SRAM SRAM — 6E SRAM — Bit 7 — 6 — R/W 5 — — 4 — — 3 — — ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors Main Device (continued) MEMORY EEPROM/ LOCATION R/W SRAM (hex) 4 — R/W 3 — — 2 — — 1 — — 0 — — 70 SRAM R Bit 7 — — 6 — ...
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Dual, Temperature-Controlled Resistors with Main Device (continued) MEMORY EEPROM/ LOCATION R/W SRAM (hex) 3 — — 2 — — 1 — — 0 — — SRAM — 74 SRAM Bit 7 — — 6 — — 5 ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors Main Device (continued) MEMORY EEPROM/ LOCATION R/W SRAM (hex) 75 SRAM R Bit 7 — — 6 — — 5 — — 4 — — 3 — — 2 — — 1 — ...
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Dual, Temperature-Controlled Resistors with Table 01h MEMORY EEPROM/ LOCATION R/W SRAM (hex) 80 SRAM R/W Bit 7 — — 6 — — 5 — — 4 — — 3 — — 2 — — 1 — — 0 — — ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors Table 01h (continued) MEMORY EEPROM/ LOCATION R/W SRAM (hex) 5 — — 4 — — 3 — — 2 — — 1 — — 0 — — EEPROM — 8C ...
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Dual, Temperature-Controlled Resistors with Table 01h (continued) MEMORY EEPROM/ LOCATION R/W SRAM (hex EEPROM — EEPROM R EEPROM R EEPROM R EEPROM R ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors Programming the Look-up Table (LUT) The following equation can be used to determine which resistor position setting, 00h to FFh, should be written in the LUT to achieve a given resistance at a ...
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Dual, Temperature-Controlled Resistors with An explanation of the binary search used to scale the gain is best served with the following example pseudo- code: /* Assume that the Null input is 0.5V addition, the requirement for LSB ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors Main Device address. The control of write privileges through the Auxiliary Device address depends on the value of APEN. Care should be taken with the setting of MPEN, once set ...
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Dual, Temperature-Controlled Resistors with After receiving a matching address byte with the R/W bit set low, if there is no write protect, the device goes into the write mode of operation (see the Memory Organization section). The master must transmit ...
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Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors SDA t BUF t LOW SCL t HD:STA STOP START Figure 6. 2-Wire AC Characteristics operation, incremented by one. This data is maintained as long valid. If the most recent ...
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Dual, Temperature-Controlled Resistors with the data line while the clock line is high will be interpreted as control signals. Accordingly, the following bus conditions have been defined: Bus not busy: Both data and clock lines remain high. Start data transfer: ...
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... Dual, Temperature-Controlled Resistors with Internally Calibrated Monitors Ordering Information (continued) PART RESISTANCE DS1859B-050+T&R 50k DS1859B-050/T&R 50k DS1859E-020 20k DS1859E-020+ 20k DS1859E-020/T&R 20k DS1859E-020+T&R 20k DS1859E-050 50k DS1859E-050+ 50k DS1859E-050+T&R 50k DS1859E-050/T&R 50k +Denotes lead-free package. T&R denotes tape-and-reel package. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied ...