PIC18F86K90-I/PT Microchip Technology, PIC18F86K90-I/PT Datasheet - Page 419

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PIC18F86K90-I/PT

Manufacturer Part Number
PIC18F86K90-I/PT
Description
64kB Flash, 4kB RAM, 1kB EE, 16MIPS, NanoWatt XLP, LCD, 5V 80 TQFP 12x12x1mm TRA
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F86K90-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 24x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
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Quantity:
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27.7
A unique feature on board the CTMU module is its ability
to generate system clock independent output pulses
based on either an internal voltage or an external capac-
itor value. When using an external voltage, this is
accomplished using the CTDIN input pin as a trigger for
the pulse delay. When using an internal capacitor
value, this is accomplished using the internal compara-
tor voltage reference module and Comparator 2 input
pin. The pulse is output onto the CTPLS pin. To enable
this mode, set the TGEN bit.
See Figure 27-4 for an example circuit. When
CTMUDS (ODCON3<0>) is cleared, the pulse delay is
determined by the output of Comparator 2, and when it
is set, the pulse delay is determined by the input of
CTDIN. C
output pulse width on CTPLS. The pulse width is calcu-
lated by T = (C
current source measurement step ( Section 27.4.1
“Current Source Calibration” ) and V is the internal
reference voltage (CV
FIGURE 27-4:
 2010 Microchip Technology Inc.
Creating a Delay with the CTMU
Module
DELAY
DELAY
is chosen by the user to determine the
/I) * V, where I is known from the
REF
TYPICAL CONNECTIONS AND INTERNAL CONFIGURATION FOR PULSE
DELAY GENERATION
).
CTEDG1
C
CTMUI
DELAY
External Reference
EDG1
Preliminary
CV
External Comparator
Current Source
PIC18F87K90
REF
Comparator
CTMU
C2
PIC18F87K90 FAMILY
An example use of the external capacitor feature is
interfacing with variable capacitive-based sensors,
such as a humidity sensor. As the humidity varies, the
pulse-width output on CTPLS will vary. An example use
of the CTDIN feature is interfacing with a digital sensor.
The CTPLS output pin can be connected to an input
capture pin and the varying pulse width measured to
determine the humidity in the application.
To use this feature:
1.
2.
3.
4.
When CTMUDS is cleared, as soon as C
to the value of the voltage reference trip point, an output
pulse is generated on CTPLS. When CTMUDS is set, as
soon as CTDIN is set, an output pulse is generated on
CTPLS.
C1
If CTMUDS is cleared, initialize Comparator 2.
If CTMUDS is cleared, initialize the comparator
voltage reference.
Initialize the CTMU and enable time delay
generation by setting the TGEN bit.
Set EDG1STAT.
CTDIN
CTPLS
CTMUDS
DS39957B-page 419
DELAY
charges

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