AD9640BCPZ-150 Analog Devices Inc, AD9640BCPZ-150 Datasheet - Page 26

IC ADC 14BIT 150MSP 1.8V 64LFCSP

AD9640BCPZ-150

Manufacturer Part Number
AD9640BCPZ-150
Description
IC ADC 14BIT 150MSP 1.8V 64LFCSP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD9640BCPZ-150

Design Resources
Interfacing ADL5534 to AD9640 High Speed ADC (CN0049)
Number Of Bits
14
Sampling Rate (per Second)
150M
Data Interface
Serial, SPI™
Number Of Converters
2
Power Dissipation (max)
938mW
Voltage Supply Source
Analog and Digital
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
64-LFCSP
For Use With
AD9640-150EBZ - BOARD EVALUATION AD9640 150MSPS
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AD9640
The output common-mode voltage of the
with the CML pin of the AD9640 (see Figure 46), and the driver
can be configured in a Sallen-Key filter topology to provide
band limiting of the input signal.
1V p-p
For baseband applications where SNR is a key parameter,
differential transformer coupling is the recommended input
configuration. An example is shown in Figure 47. To bias the
analog input, the CML voltage can be connected to the center
tap of the transformer’s secondary winding.
The signal characteristics must be considered when selecting
a transformer. Most RF transformers saturate at frequencies
below a few MHz, and excessive signal power can also cause
core saturation, which leads to distortion.
At input frequencies in the second Nyquist zone and above, the
noise performance of most amplifiers is not adequate to achieve
the true SNR performance of the AD9640. For applications where
SNR is a key parameter, differential double balun coupling is the
recommended input configuration (see Figure 49 for an example).
2V p-p
0.1µF
Figure 46. Differential Input Configuration Using the AD8138
Figure 47. Differential Transformer-Coupled Configuration
49.9Ω
49.9Ω
499Ω
523Ω
0.1µF
AD8138
499Ω
499Ω
2V p-p
ANALOG INPUT
ANALOG INPUT
R
R
R
R
C
C
0.1µF
P
C
A
D
AD8138
0.1µF
0.1µF
Figure 50. Differential Input Configuration Using the AD8352
R
Figure 49. Differential Double Balun Input Configuration
D
AD9640
VIN+
VIN–
S
VIN+
VIN–
0Ω
0Ω
AD9640
is easily set
S
R
G
CML
16
1
2
3
4
5
AVDD
CML
P
AD8352
Rev. B | Page 26 of 52
0.1µF
0.1µF
V
CC
14
0.1µF
8, 13
10
25Ω
25Ω
11
0.1µF
0.1µF
An alternative to using a transformer coupled input at frequencies
in the second Nyquist zone is to use the
driver. An example is shown in Figure 50. See the AD8352 data
sheet for more information.
In any configuration, the value of Shunt Capacitor C is dependent
on the input frequency and source impedance and may need to
be reduced or removed. Table 13 displays recommended values to
set the RC network. However, these values are dependent on the
input signal and should be used only as a starting guide.
Table 13. Example RC Network
Frequency Range (MHz)
0 to 70
70 to 200
200 to 300
>300
Single-Ended Input Configuration
A single-ended input can provide adequate performance in cost
sensitive applications. In this configuration, SFDR and distortion
performance degrade due to the large input common-mode swing.
If the source impedances on each input are matched, there should
be little effect on SNR performance. Figure 48 details a typical
single-ended input configuration.
0.1µF
1V p-p
200Ω
200Ω
R
R
0.1µF
C
10µF
49.9Ω
0.1µF
R
R
Figure 48. Single-Ended Input Configuration
C
VIN+
VIN–
0.1µF
10µF
0.1µF
AD9640
AVDD
VIN+
VIN–
AD9640
1kΩ
1kΩ
1kΩ
1kΩ
AVDD
CML
R Series
(Ω Each)
33
33
15
15
CML
R
R
C
AD8352
C Differential (pF)
15
5
5
Open
VIN+
VIN–
AD9640
differential

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