AD9255BCPZ-80 Analog Devices Inc, AD9255BCPZ-80 Datasheet - Page 11

• Manufacturer Part Number: AD9255BCPZ-80
• Description: IC ADC 14BIT 80MSPS 48LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9255BCPZ-80

• Data Interface: Serial, SPI™
• Number Of Bits: 14
• Sampling Rate (per Second): 80M
• Number Of Converters: 1
• Power Dissipation (max): 248mW
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Resolution (bits): 14bit
• Sampling Rate: 80MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 1.7V To 1.9V
• Supply Voltage Range - Digital: 1.7V To 1.9V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions (Parallel CMOS Mode)
Pin No.
ADC Power Supplies
13, 20, 29
4, 5, 34, 36, 45
33
7, 9, 10, 28, 39, 40
0
ADC Analog
42
43
38
37
47
46
2
3
Digital Input
1
Digital Outputs
11
12
14
15
16
17
18
19
21
Mnemonic
DRVDD
AVDD
SVDD
DNC
AGND
VIN+
VIN−
VREF
SENSE
RBIAS
VCM
CLK+
CLK−
SYNC
D0 (LSB)
D1
D2
D3
D4
D5
D6
D7
D8
Type
Supply
Supply
Supply
Ground
Input
Input
Input/output
Input
Input/output
Output
Input
Input
Input
Output
Output
Output
Output
Output
Output
Output
Output
Output
NOTES
1. DNC = DO NOT CONNECT.
2.
D0 (LSB)
PROVIDES THE ANALOG GROUND FOR THE INPUT. THIS EXPOSED
PAD MUST BE CONNECTED TO GROUND FOR PROPER OPERATION.
THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE PACKAGE
AVDD
AVDD
SYNC
CLK+
CLK–
DCO
OEB
DNC
DNC
DNC
Figure 4. LFCSP Parallel CMOS Pin Configuration (Top View)
D1
10
11
12
1
2
3
4
5
6
7
8
9
Analog Power Supply (1.8 V Nominal).
Digital Synchronization Pin. Slave mode only.
Description
Digital Output Driver Supply (1.8 V Nominal).
SPI Input/Output Voltage
Do Not Connect.
Analog Ground. The exposed thermal pad on the bottom of the package provides
the analog ground for the input. This exposed pad must be connected to ground for
proper operation.
Differential Analog Input Pin (+).
Differential Analog Input Pin (−).
Voltage Reference Input/Output.
Voltage Reference Mode Select. See Table 11 for details.
External Reference Bias Resistor.
Common-Mode Level Bias Output for Analog Inputs.
ADC Clock Input—True.
ADC Clock Input—Complement.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
CMOS Output Data.
PIN 1
INDICATOR
Rev. A | Page 11 of 44
(Not to Scale)
PARALLEL
AD9255
TOP VIEW
CMOS
36
35
34
33
32
31
30
29
28
27
26
25
AVDD
DITHER
AVDD
SVDD
CSB
SCLK/DFS
SDIO/DCS
DRVDD
DNC
OR
D13 (MSB)
D12
AD9255