AD7575AQ Analog Devices Inc, AD7575AQ Datasheet - Page 8

IC ADC 8BIT LC2MOS W/HOLD 18CDIP

AD7575AQ

Manufacturer Part Number
AD7575AQ
Description
IC ADC 8BIT LC2MOS W/HOLD 18CDIP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7575AQ

Rohs Status
RoHS non-compliant
Number Of Bits
8
Sampling Rate (per Second)
50k
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
15mW
Voltage Supply Source
Single Supply
Operating Temperature
-25°C ~ 85°C
Mounting Type
Through Hole
Package / Case
18-CDIP (0.300", 7.62mm)
INTERNAL/EXTERNAL CLOCK
The AD7575 can be used with its own internal clock or with an
externally applied clock. In either case, the clock signal appear-
ing at the CLK pin is divided internally by two to provide an
internal clock signal for the AD7575. A single conversion lasts
for 20 input clock cycles (10 internal clock cycles).
INTERNAL CLOCK
Clock pulses are generated by the action of the external capaci-
tor (C
discharging through an internal switch. When a conversion is
complete, the internal clock stops operating. In addition to
conversion, the internal clock also controls the automatic inter-
nal reset of the SAR. This reset occurs at the start of each con-
version cycle during the first internal clock pulse.
Nominal conversion times versus temperature for the recom-
mended R
Figure 13. Typical Conversion Times vs. Temperature
Using Internal Clock
The internal clock is useful because it provides a convenient
clock source for the AD7575. Due to process variations, the
actual operating frequency for this R
vary from device to device by up to 50%. For this reason it is
recommended that an external clock be used in the following
situations:
1. Applications requiring a conversion time that is within 50% of
2. Applications where time related software constraints cannot
AD7575
5 s, the minimum conversion time for specified accuracy. A
clock frequency of 4 MHz at the CLK pin gives a conversion
time of 5 s.
accommodate time differences that may occur due to unit to
unit clock frequency variations or temperature.
CLK
14
13
12
11
10
9
8
7
–55
) charging through an external resistor (R
CLK
R
C
CLK
CLK
and C
–25
= 100k
= 100pF
CLK
AMBIENT TEMPERATURE – C
0
combination are shown in Figure 13.
+25
+50
CLK
/C
+75
CLK
combination can
+100
CLK
) and
+125
–8–
EXTERNAL CLOCK
The CLK input of the AD7575 may be driven directly from
74 HC, 4000B series buffers (such as 4049) or from LS TTL
with a 5.6 k pull-up resistor. When conversion is complete, the
internal clock is disabled even if the external clock is still ap-
plied. This means that the external clock can continue to run
between conversions without being disabled. The mark/space
ratio of the external clock can vary from 70/30 to 30/70.
The AD7575 is specified for operation at a 5 s conversion rate;
with a 4 MHz input clock frequency. If the part is operated at
slower clock frequencies, it may result in slightly degraded accu-
racy performance from the part. This is a result of leakage ef-
fects on the hold capacitor. Figure 14 shows a typical plot of
accuracy versus conversion time for the AD7575.
2.5
2.0
1.5
1.0
0.5
0
Figure 14. Accuracy vs. Conversion Time
5
10
CONVERSION TIME – s
50
100
500
AD7575KN
1000
T
A
= +25 C
5000
10000
REV. B

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