AD7575AQ Analog Devices Inc, AD7575AQ Datasheet - Page 3

• Manufacturer Part Number: AD7575AQ
• Description: IC ADC 8BIT LC2MOS W/HOLD 18CDIP
• Manufacturer: Analog Devices Inc

Specifications of AD7575AQ

• Rohs Status: RoHS non-compliant
• Number Of Bits: 8
• Sampling Rate (per Second): 50k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 15mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -25°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 18-CDIP (0.300", 7.62mm)

ABSOLUTE MAXIMUM RATINGS*
V
V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
Digital Input Voltage to DGND . . . . . . . –0.3 V, V
Digital Output Voltage to DGND . . . . . . –0.3 V, V
CLK Input Voltage to DGND . . . . . . . . . –0.3 V, V
V
AIN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
Operating Temperature Range
TIMING SPECIFICATIONS
Parameter
t
t
t
t
t
t
t
t
NOTES
1
2
3
Specifications subject to change without notice.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7575 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. B
Test Circuits
1
2
3
4
5
6
7
8
Timing specifications are sample tested at +25 C to ensure compliance. All input control signals are specified with tr = tf = 20 ns (10% to 90% of +5 V)
t
t
and timed from a voltage level of 1.6 V.
3
7
DD
DD
REF
2
2
3
Commercial (J, K Versions) . . . . . . . . . . . . . . 0 C to +70 C
Industrial (A, B Versions) . . . . . . . . . . . . . –25 C to +85 C
Extended (S, T Versions) . . . . . . . . . . . . . –55 C to +125 C
and t
is defined as the time required for the data lines to change 0.5 V when loaded with the circuits of Figure 2.
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +7 V
Figure 1. Load Circuits for Data Access Time Test
DBN
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, V
6
are measured with the load circuits of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
a. High-Z to V
3k
DGND
Limit at +25 C
(All Versions)
0
100
100
100
0
80
10
80
0
100pF
OH
Limit at T
(J, K, A, B Versions)
0
100
100
100
0
80
10
80
0
1
b High-Z to V
DBN
(V
DD
= +5 V, V
+5V
MIN
DGND
3k
100pF
, T
DD
DD
DD
REF
MAX
OL
+ 0.3 V
+ 0.3 V
+ 0.3 V
= +1.23 V, AGND = DGND = 0 V)
DD
DD
DD
Limit at T
(S, T Versions)
0
120
120
120
0
100
10
100
0
–3–
Storage Temperature Range . . . . . . . . . . . . –65 C to +150 C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300 C
Power Dissipation (Any Package) to +75 C . . . . . . . 450 mW
Derates above +75 C by . . . . . . . . . . . . . . . . . . . . . 6 mW/ C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
MIN
DBN
, T
Figure 2. Load Circuits for Data Hold Time Test
a. V
MAX
3k
OH
Units
ns min
ns max
ns max
ns min
ns min
ns max
ns min
ns max
ns min
to High-Z
DGND
10pF
Conditions/Comments
CS to RD Setup Time
RD to BUSY Propagation Delay
Data Access Time after RD
RD Pulse Width
CS to RD Hold Time
Data Access Time after BUSY
Data Hold Time
BUSY to CS Delay
WARNING!
b. V
DBN
OL
ESD SENSITIVE DEVICE
to High-Z
AD7575
+5V
DGND
3k
10pF