LTC2418CGN#TRPBF Linear Technology, LTC2418CGN#TRPBF Datasheet - Page 30
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LTC2418CGN#TRPBF
Manufacturer Part Number
LTC2418CGN#TRPBF
Description
IC ADC 24BIT DIFF INPUT 28SSOP
Manufacturer
Linear Technology
Datasheet
1.LTC2418CGNPBF.pdf
(48 pages)
Specifications of LTC2418CGN#TRPBF
Number Of Bits
24
Sampling Rate (per Second)
7.5
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.150", 3.95mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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LTC2414/LTC2418
APPLICATIO S I FOR ATIO
In addition to this gain error, the converter INL perfor-
mance is degraded by the reference source impedance.
When F
100Ω of source resistance driving REF
into about 1.34ppm additional INL error. When F
(internal oscillator and 50Hz notch), every 100Ω of source
resistance driving REF
1.1ppm additional INL error. When F
external oscillator with a frequency f
source resistance driving REF
about 8.73 • 10
Figure 22 shows the typical INL error due to the source
resistance driving the REF
values are used. The effect of the source resistance on the
two reference pins is additive with respect to this INL error.
In general, matching of source impedance for the REF
and REF
user is thus advised to minimize the combined source
impedance driving the REF
try to match it.
The magnitude of the dynamic reference current depends
upon the size of the very stable internal sampling capaci-
tors and upon the accuracy of the converter sampling
clock. The accuracy of the internal clock over the entire
temperature and power supply range is typical better than
0.5%. Such a specification can also be easily achieved by
30
Figure 22. INL vs Differential Input Voltage (V
and Reference Source Resistance (R
Large C
REF
O
–
= LOW (internal oscillator and 60Hz notch), every
pins does not help the gain or the INL error. The
Values (C
–12
–15
–3
–6
–9
15
12
9
6
3
0
–0.5 –0.4–0.3–0.2–0.1 0 0.1 0.2 0.3 0.4 0.5
V
REF+ = 5V
REF– = GND
V
CC
INCM
–6
R
= 5V
REF
SOURCE
U
= 0.5 • (IN
• f
≥ 1µF)
+
EOSC
= 100Ω
or REF
U
+
V
R
+
+
INDIF
SOURCE
or REF
+ IN
and REF
ppm additional INL error.
/V
R
–
+
SOURCE
REFDIF
) = 2.5V
= 1000Ω
SOURCE
–
or REF
–
W
translates into about
pins when large C
= 500Ω
EOSC
–
F
C
T
+
O
pins rather than to
A
REF
O
at REF
or REF
= GND
= 25°C
–
IN
2414/18 F22
is driven by an
= 10µF
, every 100Ω of
translates into
= IN
+
–
and REF
+
U
translates
– IN
O
= HIGH
–
)
–
REF
for
+
an external clock. When relatively stable resistors
(50ppm/°C) are used for the external source impedance
seen by REF
current gain error will be insignificant (about 1% of its
value over the entire temperature and voltage range). Even
for the most stringent applications a onetime calibration
operation may be sufficient.
In addition to the reference sampling charge, the reference
pins ESD protection diodes have a temperature dependent
leakage current. This leakage current, nominally 1nA
(±10nA max), results in a small gain error. A 100Ω source
resistance will create a 0.05µV typical and 0.5µV maxi-
mum full-scale error.
Output Data Rate
When using its internal oscillator, the LTC2414/LTC2418
can produce up to 7.5 readings per second with a notch
frequency of 60Hz (F
second with a notch frequency of 50Hz (F
actual output data rate will depend upon the length of the
sleep and data output phases which are controlled by the
user and which can be made insignificantly short. When
operated with an external conversion clock (F
to an external oscillator), the LTC2414/LTC2418 output
data rate can be increased as desired up to that determined
by the maximum f
tion of the conversion phase is 20510/f
153600Hz, the converter behaves as if the internal oscil-
lator is used and the notch is set at 60Hz. There is no
significant difference in the LTC2414/LTC2418 perfor-
mance between these two operation modes.
An increase in f
translate into a proportional increase in the maximum
output data rate. This substantial advantage is neverthe-
less accompanied by three potential effects, which must
be carefully considered.
First, a change in f
in the internal notch position and in a reduction of the
converter differential mode rejection at the power line
frequency. In many applications, the subsequent perfor-
mance degradation can be substantially reduced by rely-
ing upon the LTC2414/LTC2418’s exceptional common
+
and REF
EOSC
EOSC
EOSC
–
O
will result in a proportional change
over the nominal 153600Hz will
, the expected drift of the dynamic
frequency of 2000kHz. The dura-
= LOW) and 6.25 readings per
EOSC
O
= HIGH). The
O
. If f
connected
EOSC
241418fa
=