LTC2418CGN#TRPBF Linear Technology, LTC2418CGN#TRPBF Datasheet - Page 27
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LTC2418CGN#TRPBF
Manufacturer Part Number
LTC2418CGN#TRPBF
Description
IC ADC 24BIT DIFF INPUT 28SSOP
Manufacturer
Linear Technology
Datasheet
1.LTC2418CGNPBF.pdf
(48 pages)
Specifications of LTC2418CGN#TRPBF
Number Of Bits
24
Sampling Rate (per Second)
7.5
Data Interface
MICROWIRE™, Serial, SPI™
Number Of Converters
1
Power Dissipation (max)
1mW
Voltage Supply Source
Single Supply
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
28-SSOP (0.150", 3.95mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APPLICATIO S I FOR ATIO
typical differential input resistance is 1.8MΩ which will
generate a gain error of approximately 0.28ppm for each
ohm of source resistance driving IN
HIGH (internal oscillator and 50Hz notch), the typical
differential input resistance is 2.16MΩ which will generate
a gain error of approximately 0.23ppm for each ohm of
source resistance driving IN
an external oscillator with a frequency f
conversion clock operation), the typical differential input
resistance is 0.28 • 10
source resistance driving IN
1.78 • 10
resistance on the two input pins is additive with respect to
this gain error. The typical +FS and –FS errors as a function
of the sum of the source resistance seen by IN
large values of C
In addition to this gain error, an offset error term may also
appear. The offset error is proportional with the mismatch
between the source impedance driving the two input pins
Figure 13. +FS Error vs R
–6
• f
50
40
30
20
10
0
EOSC
1
IN
V
REF
REF
IN
IN
F
T
O
A
CC
ppm gain error. The effect of the source
+
–
= GND
= 25°C
are shown in Figures 15 and 16.
U
+
–
= 3.75V
= 1.25V
= 5V
10
C
= 5V
= GND
C
IN
C
IN
IN
= 0.001µF
C
= 0.01µF
= 100pF
IN
U
= 0pF
100
R
12
SOURCE
SOURCE
+
/f
or IN
EOSC
+
(Ω)
1k
at IN
or IN
–
Ω and each ohm of
W
V
V
. When F
INCM
INCM
+
+
10k
or IN
or IN
+ 0.5V
– 0.5V
Figure 12. An RC Network at IN
–
2414/18 F13
–
EOSC
will result in
100k
IN
IN
(Small C
–
O
. When F
+
is driven by
and IN
U
(external
R
R
SOURCE
SOURCE
IN
)
–
O
for
=
C
C
IN
IN
IN
reference common mode voltages. While the input drive
circuit nonzero source impedance combined with the
converter average input current will not degrade the INL
performance, indirect distortion may result from the modu-
lation of the offset error by the common mode component
of the input signal. Thus, when using large C
values, it is advisable to carefully match the source imped-
ance seen by the IN
oscillator and 60Hz notch), every 1Ω mismatch in source
impedance transforms a full-scale common mode input
signal into a differential mode input signal of 0.28ppm.
When F
1Ω mismatch in source impedance transforms a full-scale
common mode input signal into a differential mode input
signal of 0.23ppm. When F
oscillator with a frequency f
source impedance transforms a full-scale common
mode input signal into a differential mode input signal of
+
and IN
Figure 14. –FS Error vs R
C
≅ 20pF
C
≅ 20pF
PAR
PAR
+
O
and IN
= HIGH (internal oscillator and 50Hz notch), every
–
IN
LTC2414/
IN
and with the difference between the input and
LTC2418
–10
–20
–30
–40
–50
+
–
–
0
2414/18 F12
1
V
REF
REF
IN
IN
F
T
O
A
CC
+
+
–
= GND
= 25°C
and IN
+
= 1.25V
= 3.75V
–
= 5V
LTC2414/LTC2418
10
C
= 5V
= GND
C
IN
C
IN
IN
= 0.001µF
C
= 0.01µF
= 100pF
IN
SOURCE
R
–
= 0pF
100
SOURCE
pins. When F
EOSC
O
is driven by an external
at IN
(Ω)
1k
, every 1Ω mismatch in
+
or IN
10k
O
2414/18 F14
= LOW (internal
–
100k
(Small C
IN
capacitor
27
IN
241418fa
)